IA186EM_11 Datasheet, PDF (7/146 Pages) InnovASIC, Inc – 8-Bit/16-Bit Microcontrollers

IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
Data Sheet
February 25, 2011
5.1.45 INSERV (02ch) (Slave Mode)........................................................................91
5.1.46 PRIMSK (02ah) (Master and Slave Mode) ....................................................92
5.1.47 IMASK (028h) (Master Mode).......................................................................92
5.1.48 IMASK (028h) (Slave Mode) .........................................................................93
5.1.49 POLLST (026h) (Master Mode) .....................................................................94
5.1.50 POLL (024h) (Master Mode)..........................................................................94
5.1.51 EOI (022h) End-Of-Interrupt Register (Master Mode) ..................................95
5.1.52 EOI (022h) Specific End-Of-Interrupt Register (Slave Mode) ......................95
5.1.53 INTVEC (020h) Interrupt Vector Register (Slave Mode) ..............................96
5.1.54 SSR (018h)......................................................................................................96
5.1.55 SSD0 (016h) and SSD0 (014h).......................................................................96
5.1.56 SSC (012h)......................................................................................................97
5.1.57 SSS (010h) ......................................................................................................97
5.2 Reference Documents .................................................................................................98
6. AC Specifications .................................................................................................................98
7. Instruction Set Summary Table ..........................................................................................126
7.1 Key to Abbreviations Used in Instruction Set Summary Table ................................136
7.1.1 Operand Address Byte ..................................................................................136
7.1.2 Modifier Field ...............................................................................................136
7.1.3 Auxiliary Field..............................................................................................137
7.1.4 r/m Field........................................................................................................137
7.1.5 Displacement ................................................................................................137
7.1.6 Immediate Bytes ...........................................................................................137
7.1.7 Segment Override Prefix ..............................................................................137
7.1.8 Segment Register ..........................................................................................138
7.2 Explanation of Notation Used in Instruction Set Summary Table ............................138
7.2.1 Opcode ..........................................................................................................139
7.2.2 Flags Affected After Instruction ...................................................................139
8. Innovasic/AMD Part Number Cross-Reference Tables......................................................140
9. Errata...................................................................................................................................142
9.1 Errata Summary.........................................................................................................142
9.2 Errata Detail ..............................................................................................................142
10. Revision History .................................................................................................................145
11. For Additional Information.................................................................................................146
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