IA186EM_11 Datasheet, PDF (57/146 Pages) InnovASIC, Inc – 8-Bit/16-Bit Microcontrollers

IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
Data Sheet
February 25, 2011
These default status settings may be changed as desired.
After POR, a19–a17, the three most significant bits of the address bus, start with their normal
function, allowing the processor to begin fetching instructions from the boot address FFFF0h.
Normal function is also the default setting for dt/r_n, den_n, and srdy after POR.
If the ad15–ad0 bus override is enabled, s6/clkdiv2_n and uzi_n automatically return to normal
operation. The ad15–ad0 bus override is enabled if either the bhe_n/aden_n for the IA186EM or
the rfsh2_n/aden_n for the IA188EM is held low during POR.
5. Peripheral Architecture
5.1 Control and Registers
The on-chip peripherals in the IA186EM/IA188EM are controlled from a 256-byte block of
internal registers. Although these registers are actually located in the peripherals they control,
they are addressed within a single 256-byte block of I/O space and are treated as a functional
unit. A list of these registers is presented in Table 16.
Although a named register may be 8 bits, write operations performed on the IA188EM should be
8-bit writes, resulting in 16-bit data transfers to the Peripheral Control Block (PCB) register.
Only word reads should be performed to the PCB registers. If unaligned read and write accesses
are performed on either the IA186EM or IA188EM, indeterminate behavior may result.
Note: Adhere to these directions while writing code to avoid errors.
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