IA186EM_11 Datasheet, PDF (105/146 Pages) InnovASIC, Inc – 8-Bit/16-Bit Microcontrollers

IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
Table 82. Numeric Key to Waveform Parameters (Continued)
No. Name
Description
42 tCLCL
clkouta Period
43 tCLCH clkouta Low Time
44 tCHCL clkouta High Time
45 tCH1CH2 clkouta Rise Time
46 tCL2CL1 clkouta Fall Time
47 tSRYCL srdy Transition Setup Time
48 tCLSRY srdy Transition Hold Time
49 tARYCH ardy Resolution Transition Setup Time
50 tCLARX ardy Active Hold Time
51 tARYCHL ardy Inactive Holding Time
52 tARYLCL ardy Setup Time
53 tINVCH Peripheral Setup Time
54 tINVCL drq Setup Time
55 tCLTMV Timer Output Delay
57 tRESIN res_n Setup Time
58 tHVCL
hld Setup Time
59 tRHDX rd_n High to Data Hold on ad Bus
61 tLOCK Maximum PLL Lock Time
62 tCLHAV hlda Valid Delay
63 tCHCZ Command Lines Float Delay
64 tCHCV Command Lines Valid Delay (after Float)
65 tAVWL a Address Valid to wr_n Low
66 tAVRL
a Address Valid to rd_n Low
67 tCHCSV clkouta High to lcs_n/usc_n Valid
68 tCHAV clkouta High to a Address Valid
69 tCICOA x1 to clkouta Skew
70 tCICOB x1 to clkoutb Skew
71 tCLEV
clkouta Low to sden Valid
72 tCLSL
clkouta Low to sclk High
75 tDVSH Data Valid to sclk High
77 tSHDX sclk High to SPI Data Hold
78 tSLDV
sclk Low to Data Valid
79 tCHRFD clkouta High to rfsh_n Valid
80 tCLCLX lcs_n Inactive Delay
81 tCLCSL lcs_n Active Delay
82 tCLRF
clkouta High to rfsh_n Invalid
83 tCOAOB clkouta to clkoutb Skew
84 tLRLL
lcs_n Precharge Pulse Width
85 tRFCY
rfsh_n Cycle Time
86 tLCRF
lcs_n Inactive to rfsh_n Active Delay
87 tAVBL
a Address Valid to whb_n/wlb_n Low
®
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Page 105 of 146
Data Sheet
February 25, 2011
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