IA186EM_11 Datasheet, PDF (116/146 Pages) InnovASIC, Inc – 8-Bit/16-Bit Microcontrollers

IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
Data Sheet
February 25, 2011
0ns
clkouta^CLK0
a19–a0^a19-0
ale_ale
rd_nrd_n
lcs_n
rfsh_n^rfsh_
20ns 40ns 60ns 80ns 100ns 120ns
Address
9
11
28
27
10
26
80
25
27
79
82
86
85
140ns 160ns 180ns
81
Figure 17. PSRAM Refresh Cycle
Table 87. PSRAM Refresh Cycle
No. Name
Comment
General Timing Requirements
1 tDVCL Data in Setup
2 tCLDX Data in Hold
General Timing Responses
9 tCHLH ale Active Delay
10 tLHLL ale Width
11 tCHLL ale Inactive Delay
Read/Write Cycle Timing Responses
25 tCLRL rd_n Active Delay
26 tRLRH rd_n Pulse Width
27 tCLRH rd_n Inactive Delay
28 tRHLH rd_n Inactive to ale High
80 tCLCLX lcs_n Inactive Delay
81 tCLCSL lcs_n Active Delay
Refresh Cycle Timing Responses
79 tCHRFD clkouta High to rfsh_n Valid
82 tCLRF clkouta High to rfsh_n Invalid
85 tRFCY rfsh_n Cycle Time
86 tLCRF lcs_n Inactive to rfsh_n Active Delay
Min^a
10
0
0
tCLCH-5
0
0
tCLCL
0
tCLCH
0
0
0
0
6tCLCL
2tCLCL
Max^a
–
–
8
–
8
10
–
10
–
9
9
12
12
–
NULL
a_{In nanoseconds.}
®
IA211050831-19
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