IA186EM_11 Datasheet, PDF (103/146 Pages) InnovASIC, Inc – 8-Bit/16-Bit Microcontrollers

IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
Table 81. Alphabetic Key to Waveform Parameters (Continued)
No. Name
7 tCLDV
2 tCLDX
71 tCLEV
62 tCLHAV
82 tCLRF
27 tCLRH
25 tCLRL
4 tCLSH
72 tCLSL
48 tCLSRY
55 tCLTMV
83 tCOAOB
20 tCVCTV
31 tCVCTX
21 tCVDEX
17 tCXCSX
1 tDVCL
75 tDVSH
19 tDXDL
58 tHVCL
53 tINVCH
54 tINVCL
86 tLCRF
23 tLHAV
10 tLHLL
13 tLLAX
61 tLOCK
84 tLRLL
57 tRESIN
85 tRFCY
29 tRHAV
59 tRHDX
28 tRHLH
26 tRLRH
77 tSHDX
78 tSLDV
47 tSRYCL
35 tWHDEX
34 tWHDX
33 tWHLH
32 tWLWH
Description
Data Valid Delay
Data in Hold
clkouta Low to sden Valid
hlda Valid Delay
clkouta High to rfsh_n Invalid
rd_n Inactive Delay
rd_n Active Delay
Status Inactive Delay
clkouta Low to sclk Low
srdy Transition Hold Time
Timer Output Delay
clkouta to clkoutb Skew
Control Active Delay 1
Control Inactive Delay
den_n Inactive Delay
mcs_n/pcs_n Hold from Command Inactive
Data in Setup
Data Valid to SCLK High
den_n Inactive to dt/r_n Low
hld Setup Time
Peripheral Setup Time
drq Setup Time
lcs_n Inactive to rfsh_n Active Delay
ale High to Address Valid
ale Width
ad Address Hold from ALE Inactive
Maximum PLL Lock Time
lcs_n Precharge Pulse Width
res_n Setup Time
rfsh_n Cycle Time
rd_n Inactive to ad Address Active
rd_n High to Data Hold on ad Bus
rd_n Inactive to ale High
rd_n Pulse Width
sclk High to SPI Data Hold
sclk Low SPI Data Hold
srdy Transition Setup Time
wr_n Inactive to den_n Inactive
Data Hold after wr_n
wr_n Inactive to ale High
wr_n Pulse Width
®
IA211050831-19
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Page 103 of 146
Data Sheet
February 25, 2011
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