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MC9RS08KA8RM Datasheet, PDF (80/190 Pages) Freescale Semiconductor, Inc – MC9RS08KA8 Features
Chapter 8 Central Processor Unit (RS08CPUV1)
Table 8-1. Instruction Set Summary (Sheet 2 of 6)
Source
Form
Description
Operation
Effect
on
CCR
ZC
BHS rel (1)
Branch if Higher or Same
(Same as BCC)
PC ← (PC) + $0002 + rel, if (C) = 0
— — REL
34
BLO rel (1)
Branch if Lower (Same
as BCS)
PC ← (PC) + $0002 + rel, if (C) = 1 — — REL
35
BNE rel
Branch if Not Equal
PC ← (PC) + $0002 + rel, if (Z) = 0 — — REL
36
BRA rel
Branch Always
PC ← (PC) + $0002 + rel
— — REL
30
BRN rel (1)
Branch Never
PC ← (PC) + $0002
— — REL
30
DIR (b0) 01
DIR (b1) 03
DIR (b2) 05
DIR (b3) 07
DIR (b4) 09
DIR (b5) 0B
BRCLR n,opr8a,rel
DIR (b6) 0D
DIR (b7) 0F
IX (b0)
01
IX (b1)
03
IX (b2)
05
BRCLR n,D[X],rel
Branch if Bit n in Memory
Clear
PC ← (PC) + $0003 + rel, if (Mn) = 0
—¦
IX (b3)
IX (b4)
07
09
IX (b5)
0B
IX (b6)
0D
IX (b7)
0F
DIR (b0) 01
BRCLR n,X,rel
DIR (b1) 03
DIR (b2) 05
DIR (b3) 07
DIR (b4) 09
DIR (b5) 0B
DIR (b6) 0D
DIR (b7) 0F
rr
3
rr
3
rr
3
rr
3
00 3
dd rr 5
dd rr 5
dd rr 5
dd rr 5
dd rr 5
dd rr 5
dd rr 5
dd rr 5
0E rr 5
0E rr 5
0E rr 5
0E rr 5
0E rr 5
0E rr 5
0E rr 5
0E rr 5
0F rr 5
0F rr 5
0F rr 5
0F rr 5
0F rr 5
0F rr 5
0F rr 5
0F rr 5
1. This is a pseudo instruction supported by the normal RS08 instruction set.
2. This instruction is different from that of the HC08 and HCS08 in that the RS08 does not auto-increment the index register.
MC9RS08KA8 Series Reference Manual, Rev. 3
80
Freescale Semiconductor