MC9RS08KA8RM Datasheet, PDF (11/190 Pages) Freescale Semiconductor, Inc – MC9RS08KA8 Features

7.3 Register Definition ..........................................................................................................................64
7.3.1 KBI Status and Control Register (KBISC) .......................................................................65
7.3.2 KBI Pin Enable Register (KBIPE) ....................................................................................65
7.3.3 KBI Edge Select Register (KBIES) ..................................................................................66
7.4 Functional Description ....................................................................................................................66
7.4.1 Edge Only Sensitivity .......................................................................................................66
7.4.2 Edge and Level Sensitivity ...............................................................................................67
7.4.3 KBI Pullup/Pulldown Resistors ........................................................................................67
7.4.4 KBI Initialization ..............................................................................................................67
Chapter 8
Central Processor Unit (RS08CPUV1)
8.1 Introduction .....................................................................................................................................69
8.2 Programmer’s Model and CPU Registers .......................................................................................69
8.2.1 Accumulator (A) ...............................................................................................................70
8.2.2 Program Counter (PC) ......................................................................................................71
8.2.3 Shadow Program Counter (SPC) ......................................................................................71
8.2.4 Condition Code Register (CCR) .......................................................................................71
8.2.5 Indexed Data Register (D[X]) ...........................................................................................72
8.2.6 Index Register (X) ............................................................................................................72
8.2.7 Page Select Register (PAGESEL) .....................................................................................73
8.3 Addressing Modes ...........................................................................................................................73
8.3.1 Inherent Addressing Mode (INH) .....................................................................................73
8.3.2 Relative Addressing Mode (REL) ....................................................................................73
8.3.3 Immediate Addressing Mode (IMM) ................................................................................74
8.3.4 Tiny Addressing Mode (TNY) ..........................................................................................74
8.3.5 Short Addressing Mode (SRT) .........................................................................................75
8.3.6 Direct Addressing Mode (DIR) ........................................................................................75
8.3.7 Extended Addressing Mode (EXT) ..................................................................................75
8.3.8 Indexed Addressing Mode (IX, Implemented by Pseudo Instructions) ............................75
8.4 Special Operations ...........................................................................................................................75
8.4.1 Reset Sequence .................................................................................................................76
8.4.2 Interrupts ...........................................................................................................................76
8.4.3 Wait and Stop Mode ..........................................................................................................76
8.4.4 Active Background Mode .................................................................................................76
8.5 Summary Instruction Table .............................................................................................................77
Chapter 9
Analog Comparator (RS08ACMPV1)
9.1 Introduction .....................................................................................................................................87
9.1.1 Features .............................................................................................................................88
9.1.2 Modes of Operation ..........................................................................................................88
9.1.3 Block Diagram ..................................................................................................................88
9.2 External Signal Description ............................................................................................................89
9.3 Register Definition ..........................................................................................................................89
MC9RS08KA8 Series Reference Manual, Rev. 3
Freescale Semiconductor
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