MC9RS08KA8RM Datasheet, PDF (135/190 Pages) Freescale Semiconductor, Inc – MC9RS08KA8 Features

Inter-Integrated Circuit (RS08IICV2)
12.3 Register Definition
This section consists of the IIC register descriptions in address order.
Refer to the direct-page register summary in the Memory chapter of this data sheet for the absolute address
assignments for all IIC registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
12.3.1 IIC Address Register (IICA)
7
6
5
4
3
2
1
0
R
0
AD7
AD6
AD5
AD4
AD3
AD2
AD1
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 12-3. IIC Address Register (IICA)
Table 12-2. IICA Field Descriptions
Field
7:1
AD[7:1]
Description
Slave Address — The AD[7:1] field contains the slave address to be used by the IIC module. This field is used
on the 7-bit address scheme and the lower seven bits of the 10-bit address scheme.
12.3.2 IIC Frequency Divider Register (IICF)
7
6
5
4
3
2
1
0
R
MULT
ICR
W
Reset
0
0
0
0
0
0
0
0
Figure 12-4. IIC Frequency Divider Register (IICF)
MC9RS08KA8 Series Reference Manual, Rev. 3
Freescale Semiconductor
135