MC9RS08KA8RM Datasheet, PDF (36/190 Pages) Freescale Semiconductor, Inc – MC9RS08KA8 Features

Chapter 4 Memory
These operations must be performed in the order shown, or other unrelated
operations may occur between the steps.
4.6.3 Flash Mass Erase Operation
To mass erase the entire flash memory:
1. Apply external V_PP.
2. Set the MASS bit in the flash control register.
3. Write any data to any flash location via the high page accessing window $00C0–$00FF. (Prior to
the data writing operation, the PAGESEL register must be configured correctly to map the high-
page-accessing window to any flash locations.)
4. Wait for a time, t_nvs.
5. Set the HVEN bit.
6. Wait for a time t_me.
7. Clear the MASS bit.
8. Wait for a time, t_nvh1.
9. Clear the HVEN bit.
10. After t_rcv time, the memory can be accessed in read mode again.
11. Remove external V_PP.
NOTE
Software code executed from flash locations cannot program or erase flash
memory. To program or erase flash, commands must be executed from
RAM or BDC commands. User code must not enter wait or stop during an
erase or program sequence.
These operations must be performed in the order shown or other unrelated
operations may occur between the steps.
4.6.4 Security
The MC9RS08KA8 series includes circuitry to help prevent unauthorized access to flash memory
contents. When security is engaged, flash is a secure resource. The RAM, direct-page registers, and
background debug controller are unsecured resources. Attempts to access a secure memory location are
blocked (reads return all 0s) if they are through the background debug interface, or when BKGDPE is set.
Security is engaged or disengaged based on the state of a nonvolatile register bit (SECD) in the FOPT
register. During reset, the nonvolatile location NVOPT contents are copied from flash into the working
FOPT register in high-page register space. Engage security by programming the NVOPT location. You can
do this while the flash memory is programmed. The erased state (SECD = 1) makes the MCU unsecure.
When SECD in NVOPT is programmed (SECD = 0), the next time the device is reset via POR, internal
reset, or external reset, security is engaged. To disengage security, mass erase must be performed via BDM
commands and followed by any reset.
MC9RS08KA8 Series Reference Manual, Rev. 3
36
Freescale Semiconductor