MC9RS08KA8RM Datasheet, PDF (187/190 Pages) Freescale Semiconductor, Inc – MC9RS08KA8 Features

Chapter 15 Development Support
Table 15-2. RS08 BDC Command Summary (continued)
Command
Mnemonic
Active Background
Mode/
Non-Intrusive
Coding
Structure
Description
WRITE_A
Active background
mode
48/WD/d
Write accumulator (A)
READ_CCR_PC
Active background
mode
6B/d/RD16⁵
Read the CCR bits z, c concatenated with
the 14-bit program counter (PC)
RD16=zc:PC
WRITE_CCR_PC
Active background
mode
4B/WD16/d⁶
Write the CCR bits z, c concatenated with
the 14-bit program counter (PC)
WD16=zc:PC
READ_SPC
Active background
mode
6F/d/RD16⁷
Read the 14-bit shadow program counter
(SPC)
RD16=0:0:SPC
WRITE_SPC
Active background
mode
4F/WD16/d⁸
Write 14-bit shadow program counter
(SPC)
WD16 = x:x:SPC, the two most significant
bits shown by “x” are ignored by target
1 _{The SYNC command is a special operation which does not have a command code.}
2 _{18 was HCS08 BDC command for TAGGO.}
3 _{Each RD requires a delay between host read data byte and next read, command ends when target detects a soft-reset.}
4 _{Each WD requires a delay between host write data byte and next byte, command ends when target detects a soft-reset.}
5 _{HCS08 BDC had separate READ_CCR and READ_PC commands, the RS08 BDC combined this commands.}
6 _{HCS08 BDC had separate WRITE_CCR and WRITE_PC commands, the RS08 BDC combined this commands.}
7 _{6F is READ_SP (read stack pointer) for HCS08 BDC.}
8 _{4F is WRITE_SP (write stack pointer) for HCS08 BDC.}
MC9RS08KA8 Series Reference Manual, Rev. 3
Freescale Semiconductor
187