MC9RS08KA8RM Datasheet, PDF (19/190 Pages) Freescale Semiconductor, Inc – MC9RS08KA8 Features

1.3 System Clock Distribution
Chapter 1 MC9RS08KA8 Device Overview
SYSTEM CONTROL LOGIC
RTICLKS
TCLK
ICSERCLK
1 kHz
IIC
MTIM1 MTIM2 TPM
RTI
ICSFFCLK
÷2
ICS
ICSOUT
FFCLK¹
SYNC
÷2 ^{BUS CLOCK}
XOSC
COP
CPU
ADC
BDC FLASH
EXTAL XTAL
1 _{The fixed frequency clock (FFCLK) is internally synchronized to the bus clock and must not exceed one}
half of the bus clock frequency.
Figure 1-2. System Clock Distribution Diagram
Figure 1-2 shows a simplified clock connection diagram for the MCU. The bus clock frequency is half the
ICS output frequency and used by all internal modules.
MC9RS08KA8 Series Reference Manual, Rev. 3
Freescale Semiconductor
19