DS892 Datasheet, PDF (77/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Date
02/24/2015
11/14/2014
07/10/2014
05/16/2014
Version
1.5
1.4
1.3
1.2
Description of Revisions
In Table 1, added I_DC and I_RMS and updates to the GTH and GTY Transceivers I_DCIN/OUT
section including adding Note 9.
Added many specifications and recommended values to Table 3. Updated specifications in
Table 4, Table 5, and Table 6. Added Table 7. Revised the V_OCM maximum for
MINI_LVDS_25 and RSDS_25 in Table 12. Revised the V_ICM specifications in Table 14.
Removed rows from Table 16 and Table 17. Removed V_OH and V_OL rows, revised the V_OCM
maximum, and revised V_ICM in Table 18. Removed V_OH and V_OL rows and revised V_ICM in
Table 19.
Updated the following tables specifically addressing FBVA900 design specifications;
Table 21, Table 22, Table 45, and Table 49. Removed Table 27.
Updated Table 20, Table 21, Table 22, Table 27, and Table 28 with speed specifications for
Vivado Design Suite 2014.4.1.
Completely revised the Performance Characteristics section including adding Table 23,
Table 24, and Table 25, updating Table 26 (including Note 7), and removing Table 27:
Maximum Physical Interface (PHY) Rate for Memory Interfaces (FBV Packages). Added
the section: I/O Standard Adjustment Measurement Methodology. Revised F_REFCLK in
Table 33. Revised MMCM_T_LOCKMAX in Table 36. Revised the F_INMAX in Table 36 and
Table 37. Updated Table 44. Updated devices listed, packages listed, and package skew
in Table 45. Updated V_CMOUTDC and D_VPPOUT in Table 46. Added Table 48. Table 49. Added
new values and descriptions to both Table 55 and Table 56. Updated the F_{DRP_CLK} in
Table 80, Table 81, and Table 82. Added to F_{CORE_CLK} and F_USERCLK Table 80. Updated
On-chip reference and Note 5 in Table 83. Updated the F_EMCCK, F_SCCK, F_MCCK, T_POR, and
T_USRCCLKO specifications in Table 86.
Updated Note 2 and Note 3 in Table 1 and Note 3, Note 4, and Note 6 in Table 2. Updated
Note 3 in Table 6. Revised the Power-On/Off Power Supply Sequencing section. Updated
the descriptions in Table 8. Removed Note 1 from both Table 26 and Table 27. Revised
DDR3 specification for FBVA900 package -2I speed grade in Table 27. Updated Table 20,
Table 27, and Table 28 with speed specifications for Vivado Design Suite 2014.3. Updated
the descriptions in Table 37. Added a discussion on the data in the device pin-to-pin
parameter tables on page 40 and page 42. Revised the values for F_{LBUS_CLK} in Table 80.
Updated Note 5 in Table 83. In Table 86, added more speed specifications, updated T_PL,
F_MCCKTOL, and F_RBCCK, added the STARTUPE3 Ports section, and added Note 1.
Updated LVDCI_15 information in Table 10. Revised the SLVS_400 values in Table 12.
Updated Table 20 and all the tables relevant to the latest speed specification Vivado
2014.2 v1.08.
Removed RLDRAM II from Table 26 and Table 27. Also added FBV Package to Table 27.
Removed T_{DELAY_RST_RDY} from Table 33. Revised MMCM_F_INDUTY in Table 36 and
PLL_F_INDUTY in Table 37. Updated the V_IN description in Table 46. Updated Figure 3 and
Figure 4. Updated Note 1 in Table 55. Added two new sections for the Integrated Interface
Block for Interlaken for the XCKU095 and the Integrated Interface Block for 100G
Ethernet MAC and PCS for the XCKU095.
Updated Note 2, added I_OL and I_OH specifications, and added Note 3 and Note 4 to Table 9
and Table 10. In Table 12, revised the MINI_LVDS_25 and RSDS_25 maximum value for
V_OCM and added SLVS_400 specifications. In Table 13 and Table 14, Added the I_OL and
I_OH specifications. Removed the POD standards from Table 10 and Table 14.
Updated the AC Switching Characteristics section and Table 20 based upon the Vivado
Design Suite 2014.1 v1.06 speed specifications. Updated T_{PW_WF_NC} in Table 32. Revised
MMCM_T_FBDELAY in Table 36, and added PLL_F_BANDWIDTH to Table 37. Updated format and
notes in Table 42 and Table 43.
Revised notes in Table 49. Updated value for F_GTHDRPCLK in Table 50. Updated the 0.90V
values for F_TXOUTPROGDIV and F_RXOUTPROGDIV in Table 54, and the corresponding F_MAX in
Table 35. In Table 83, updated On-Chip Sensor Accuracy section, removed Gain error
conditions, updated Note 1, and added Note 3.
In Table 86, revised T_POR specifications and updated F_MCCK, F_SCCK, F_ICAPCK, F_RBCCK,
T_TAPTCK/T_TCKTAP, T_TCKTDO, and F_TCK.
DS892 (v1.12) April 1, 2016
Product Specification
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