DS892 Datasheet, PDF (16/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
LVDS DC Specifications (LVDS_25)
The LVDS_25 standard is available in the HR I/O banks. See the UltraScale Architecture SelectIO Resources
User Guide (UG571) for more information.
Table 18: LVDS_25 DC Specifications
Symbol
DC Parameter
Conditions
Min Typ Max Units
V_CCO
V_ODIFF(1)
Supply voltage
Differential Output Voltage:
(Q – Q), Q = High
(Q – Q), Q = High
2.375 2.500 2.625 V
R_T = 100Ω across Q and Q signals 247 350 600 mV
V_OCM(1)
V_IDIFF
Output Common-Mode Voltage
Differential Input Voltage:
(Q – Q), Q = High
(Q – Q), Q = High
R_T = 100 Ω across Q and Q signals 1.000 1.250 1.485
V
100 350 600⁽²⁾ mV
V_{ICM_DC(3)} Input Common-Mode Voltage (DC Coupling)
V_{ICM_AC(4)} Input Common-Mode Voltage (AC Coupling)
0.300 1.200 1.500 V
0.600 – 1.100 V
Notes:
1. V_OCM and V_ODIFF values are for LVDS_PRE_EMPHASIS = FALSE.
2.
Maximum
when the
rVe^Ic^Do^Im^FFmvaelnudeeids
osppeercaiftiiendgfcoorntdhietiomnasxaimndumovVe^Ir^Cs^Mhosopte/cuinfidceartisohno.oWt Vit_I^h_N ^{asploewciefircaVtI}i^Co^Mn,saahreigmhearinVt^Da^Iin^FFedis.
tolerated
only
3. Input common mode voltage for DC coupled configurations. EQUALIZATION = EQ_NONE (Default).
4. External input common mode voltage specification for AC coupled configurations. EQUALIZATION = EQ_LEVEL0,
EQ_LEVEL1, EQ_LEVEL2, EQ_LEVEL3, EQ_LEVEL4.
LVDS DC Specifications (LVDS)
The LVDS standard is available in the HP I/O banks. See the UltraScale Architecture SelectIO Resources User
Guide (UG571) for more information.
Table 19: LVDS DC Specifications
Symbol
DC Parameter
Conditions
Min Typ Max Units
V_CCO
V_ODIFF(1)
Supply voltage
Differential Output Voltage
(Q – Q), Q = High
(Q – Q), Q = High
1.710 1.800 1.890 V
R_T = 100Ω across Q and Q signals 247 350 600 mV
V_OCM(1)
Output Common-Mode Voltage
R_T = 100 Ω across Q and Q signals 1.000 1.250 1.425 V
V_IDIFF
Differential Input Voltage
(Q – Q), Q = High
(Q – Q), Q = High
100 350 600⁽²⁾ mV
V_{ICM_DC(3)}
V_{ICM_AC(4)}
Input Common-Mode Voltage (DC Coupling)
Input Common-Mode Voltage (AC Coupling)
0.300 1.200 1.425 V
0.600 – 1.100 V
Notes:
1. V_OCM and V_ODIFF values are for LVDS_PRE_EMPHASIS = FALSE.
2.
Maximum
when the
rVe^Ic^Do^Im^FFmvaelnudeeids
osppeecraiftieindgfcoornthdietiomnasxaimndumovVe^Ir^Cs^Mhosopte/cuinfidcaetrisohno.oWt Vith_IN^{asploewciefircVatI}i^Co^Mn,saahreigmhearinVt^Da^Ii^Fn^Feids.tolerated
only
3. Input common mode voltage for DC coupled configurations. EQUALIZATION = EQ_NONE (Default).
4. External input common mode voltage specification for AC coupled configurations. EQUALIZATION = EQ_LEVEL0,
EQ_LEVEL1, EQ_LEVEL2, EQ_LEVEL3, EQ_LEVEL4.
DS892 (v1.12) April 1, 2016
Product Specification
www.xilinx.com
Send Feedback
16