English
Language : 

DS892 Datasheet, PDF (14/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics
Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Table 12: Differential SelectIO DC Input and Output Levels
I/O
Standard
VICM (V)(1)
VID(V)(2)
Min Typ Max Min Typ Max
Min
VOCM(V)(3)
Typ
Max
VOD(V)(4)
Min Typ Max
BLVDS_25
0.300 1.200 1.425 0.100 –
–
–
1.250
–
Note 5
MINI_LVDS_25 0.300 1.200 VCCAUX 0.200 0.400 0.600
SUB_LVDS
0.500 0.900 1.300 0.070 –
–
1.000
0.700
1.200
0.900
1.485
1.100
0.300 0.450 0.600
0.100 0.150 0.200
LVPECL
0.300 1.200 1.425 0.100 0.350 0.600
–
–
–
–
–
–
PPDS_25
RSDS_25
0.200 0.900 VCCAUX 0.100 0.250 0.400
0.300 0.900 1.500 0.100 0.350 0.600
0.500
1.000
0.950
1.200
1.400
1.485
0.100 0.250 0.400
0.100 0.350 0.600
SLVS_400_18 0.070 0.200 0.330 0.140 – 0.450
–
–
–
–
–
–
SLVS_400_25 0.070 0.200 0.330 0.140 – 0.450
–
–
–
–
–
–
TMDS_33
2.700 2.965 3.230 0.150 0.675 1.200 VCCO – 0.405 VCCO – 0.300 VCCO – 0.190 0.400 0.600 0.800
Notes:
1. VICM is the input common mode voltage.
2. VID is the input differential voltage (Q – Q).
3. VOCM is the output common mode voltage.
4. VOD is the output differential voltage (Q – Q).
5. VOD for BLVDS will vary significantly depending on topology and loading.
6. LVDS_25 is specified in Table 18.
7. LVDS is specified in Table 19.
Table 13: Complementary Differential SelectIO DC Input and Output Levels for HR I/O Banks
I/O Standard
VICM (V)(1)
Min Typ Max
VID (V)(2)
Min Max
VOL (V)(3)
Max
VOH (V)(4)
Min
IOL
mA
IOH
mA
DIFF_HSTL_I
0.300 0.750 1.125 0.100 –
0.400
VCCO – 0.400
8.0
DIFF_HSTL_I_18 0.300 0.900 1.425 0.100 –
0.400
VCCO – 0.400
8.0
DIFF_HSTL_II
0.300 0.750 1.125 0.100 –
0.400
VCCO – 0.400
16.0
DIFF_HSTL_II_18 0.300 0.900 1.425 0.100 –
0.400
VCCO – 0.400
16.0
DIFF_HSUL_12
0.300 0.600 0.850 0.100 –
20% VCCO
80% VCCO
0.1
DIFF_SSTL12
0.300 0.600 0.850 0.100 – (VCCO/2) – 0.150 (VCCO/2) + 0.150 14.25
DIFF_SSTL135
0.300 0.675 1.000 0.100 – (VCCO/2) – 0.150 (VCCO/2) + 0.150 13.0
DIFF_SSTL135_R 0.300 0.675 1.000 0.100 – (VCCO/2) – 0.150 (VCCO/2) + 0.150
8.9
DIFF_SSTL15
0.300 0.750 1.125 0.100 – (VCCO/2) – 0.175 (VCCO/2) + 0.175 13.0
DIFF_SSTL15_R
0.300 0.750 1.125 0.100 – (VCCO/2) – 0.175 (VCCO/2) + 0.175
8.9
DIFF_SSTL18_I
0.300 0.900 1.425 0.100 – (VCCO/2) – 0.470 (VCCO/2) + 0.470
8.0
DIFF_SSTL18_II 0.300 0.900 1.425 0.100 – (VCCO/2) – 0.600 (VCCO/2) + 0.600 13.4
–8.0
–8.0
–16.0
–16.0
–0.1
–14.25
–13.0
–8.9
–13.0
–8.9
–8.0
–13.4
Notes:
1. VICM is the input common mode voltage.
2. VID is the input differential voltage.
3. VOL is the single-ended low-output voltage.
4. VOH is the single-ended high-output voltage.
DS892 (v1.12) April 1, 2016
Product Specification
www.xilinx.com
Send Feedback
14