DS892 Datasheet, PDF (49/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Table 54: GTH Transceiver User Clock Switching Characteristics⁽¹⁾
Symbol
Data Width Conditions
Description
(Bit)
Speed Grade, Temperature Ranges,
and V_CCINT Operating Voltages
1.0V
0.95V
0.90V
Units
Internal Interconnect
Logic
Logic
-3E
-2E, -2I
-1C, -1I,
-1LI
-1LI
F_TXOUTPMA
TXOUTCLK maximum frequency sourced
from OUTCLKPMA
511.719
511.719
390.625 390.625 MHz
F_RXOUTPMA
RXOUTCLK maximum frequency sourced
from OUTCLKPMA
511.719
511.719
390.625 390.625 MHz
F_TXOUTPROGDIV
TXOUTCLK maximum frequency sourced
from TXPROGDIVCLK
511.719
511.719
511.719 511.719 MHz
F_RXOUTPROGDIV
RXOUTCLK maximum frequency sourced
from RXPROGDIVCLK
511.719
511.719
511.719 511.719 MHz
F_TXIN
16
TXUSRCLK
32
maximum
frequency
20
40
16, 32
32, 64
20, 40
40, 80
511.719
511.719
409.375
409.375
511.719
511.719
409.375
409.375
390.625
390.625
312.500
312.500
390.625
390.625
312.500
312.500
MHz
MHz
MHz
MHz
F_RXIN
16
RXUSRCLK
32
maximum
frequency
20
40
16, 32
32, 64
20, 40
40, 80
511.719
511.719
409.375
409.375
511.719
511.719
409.375
409.375
390.625
390.625
312.500
312.500
390.625
390.625
312.500
312.500
MHz
MHz
MHz
MHz
16
16
511.719
511.719
390.625 390.625 MHz
F_TXIN2
16, 32
32
511.719
511.719
390.625 390.625 MHz
TXUSRCLK2
32
maximum
frequency
20
64
255.860
255.860
195.313 195.313 MHz
20
409.375
409.375
312.500 312.500 MHz
20, 40
40
409.375
409.375
312.500 312.500 MHz
40
80
204.688
204.688
156.250 156.250 MHz
16
16
511.719
511.719
390.625 390.625 MHz
F_RXIN2
16, 32
32
511.719
511.719
390.625 390.625 MHz
RXUSRCLK2
32
maximum
frequency
20
64
255.860
255.860
195.313 195.313 MHz
20
409.375
409.375
312.500 312.500 MHz
20, 40
40
409.375
409.375
312.500 312.500 MHz
40
80
204.688
204.688
156.250 156.250 MHz
Notes:
1. Clocking must be implemented as described in UltraScale Architecture GTH Transceiver User Guide (UG576).
DS892 (v1.12) April 1, 2016
Product Specification
www.xilinx.com
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