DS892 Datasheet, PDF (37/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Clock Buffers and Networks
Table 35: Clock Buffers Switching Characteristics
Symbol
Description
Speed Grade and
V_CCINT Operating Voltages
1.0V
0.95V
0.90V
-3
-2
-1/-1L -1L
Global Clock Switching Characteristics (Including BUFGCTRL)
F_MAX
Maximum frequency of a global clock tree (BUFG)
850
725
630
630
Global Clock Buffer with Input Divide Capability (BUFGCE_DIV)
F_MAX
Maximum frequency of a global clock buffer with input
divide capability (BUFGCE_DIV)
850
725
630
630
Global Clock Buffer with Clock Enable (BUFGCE)
F_MAX
Maximum frequency of a global clock buffer with clock
enable (BUFGCE)
850
725
630
630
Leaf Clock Buffer with Clock Enable (BUFCE_LEAF)
F_MAX
Maximum frequency of a leaf clock buffer with clock
enable (BUFCE_LEAF)
850
725
630
630
GTH/GTY Clock Buffer with Clock Enable and Clock Input Divide Capability (BUFG_GT)
F_MAX
Maximum frequency of a serial transceiver clock buffer
with clock enable and clock input divide capability
512
512
512
512
Units
MHz
MHz
MHz
MHz
MHz
DS892 (v1.12) April 1, 2016
Product Specification
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