DS892 Datasheet, PDF (47/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
GTH Transceiver Switching Characteristics
Consult the UltraScale Architecture GTH Transceiver User Guide (UG576) for further information.
Table 49: GTH Transceiver Performance
Symbol
Description
Output
Divider
1.0V
Speed Grade, Temperature Ranges,
and V_CCINT Operating Voltages
0.95V
0.90V
-3E
-2E, -2I
-1C,-1I,-1LI
-1LI
F_GTHMAX
F_GTHMIN
Package Type FF/FL
GTH maximum line rate 16.375
GTH minimum line rate 0.5
Min
FB
12.5
0.5
Max
FF/FL
16.375
0.5
Min
FB
12.5
0.5
Max
All Packages
12.5
0.5
Min Max
All Packages
12.5⁽¹⁾
0.5
Min
Max
1
4.0
12.5
4.0
12.5
4.0
8.5
4.0
8.5
F_GTHCRANGE
CPLL line rate
range⁽²⁾
2
2.0
6.25
2.0
6.25
2.0 4.25 2.0
4.25
4
1.0 3.125 1.0 3.125 1.0 2.125 1.0 2.125
8
0.5 1.5625 0.5 1.5625 0.5 1.0625 0.5 1.0625
16
N/A
Min
Max
Min
Max
Min Max Min
Max
1
9.8 16.375 9.8 16.375 9.8 12.5 9.8
12.5
2
4.9 8.1875 4.9 8.1875 4.9 8.1875 4.9 8.1875
F_GTHQRANGE1
QPLL0 line rate
range⁽³⁾
4
2.45 4.0938 2.45 4.0938 2.45 4.0938 2.45 4.0938
8
1.225 2.0469 1.225 2.0469 1.225 2.0469 1.225 2.0469
16 0.6125 1.0234 0.6125 1.0234 0.6125 1.0234 0.6125 1.0234
Min
Max
Min
Max
Min Max Min
Max
1
8.0
13.0
8.0
13.0
8.0 12.5 8.0
12.5
2
F_GTHQRANGE2
QPLL1 line rate
range⁽⁴⁾
4
8
4.0
6.5
4.0
6.5
4.0
6.5
4.0
6.5
2.0
3.25
2.0
3.25
2.0 3.25 2.0
3.25
1.0 1.625 1.0 1.625 1.0 1.625 1.0 1.625
16
0.5 0.8125 0.5 0.8125 0.5 0.8125 0.5 0.8125
Min
Max
Min
Max
Min Max Min
Max
F_CPLLRANGE
F_QPLL0RANGE
F_QPLL1RANGE
CPLL frequency range
QPLL0 frequency range
QPLL1 frequency range
2.0
6.25
2.0
6.25
2.0 4.25 2.0
4.25
9.8 16.375 9.8 16.375 9.8 16.375 9.8 16.375
8.0
13.0
8.0
13.0
8.0 13.0 8.0
13.0
Notes:
1. Designs must use Vivado Design Suite v2015.4.1 or later to achieve 12.5 Gb/s.
2. The values listed are the rounded results of the calculated equation (2 x CPLL_Frequency)/Output_Divider.
3. The values listed are the rounded results of the calculated equation (QPLL0_Frequency)/Output_Divider.
4. The values listed are the rounded results of the calculated equation (QPLL1_Frequency)/Output_Divider.
Units
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
GHz
GHz
GHz
Table 50: GTH Transceiver Dynamic Reconfiguration Port (DRP) Switching Characteristics
Symbol
Description
All Devices
Units
F_GTHDRPCLK GTHDRPCLK maximum frequency
250
MHz
DS892 (v1.12) April 1, 2016
Product Specification
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