DS892 Datasheet, PDF (25/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Table 27: IOB High Range (HR) Switching Characteristics (Cont’d)
I/O Standards
T_{INBUF_DELAY_PAD_I}
1.0V
0.95V
0.9V
-3
-2
-1/
-1L
-1L
T_{OUTBUF_DELAY_O_PAD}
1.0V
0.95V
0.9V
-3
-2
-1/
-1L
-1L
T_{OUTBUF_DELAY_TD_PAD}
1.0V
0.95V
0.9V
-3
-2
-1/
-1L
-1L
Units
LVCMOS33_S_4
0.96 0.97 1.03 1.03 3.23 3.23 3.67 3.67 3.23 3.23 3.67 3.67 ns
LVCMOS33_S_8
0.96 0.97 1.03 1.03 2.28 2.28 2.55 2.55 2.66 2.67 2.78 2.78 ns
LVDS_25
0.45 0.58 0.62 0.63 0.80 0.83 0.95 0.95 105.74 105.74 105.85 105.85 ns
LVPECL
0.43 0.57 0.62 0.63 N/A N/A N/A N/A N/A N/A N/A N/A ns
LVTTL_F_12
1.04 1.04 1.05 1.06 1.83 1.83 2.10 2.10 1.83 1.83 2.10 2.10 ns
LVTTL_F_16
1.04 1.04 1.05 1.06 1.79 1.79 2.06 2.06 1.79 1.79 2.06 2.06 ns
LVTTL_F_4
1.04 1.04 1.05 1.06 2.34 2.34 2.63 2.63 2.34 2.34 2.63 2.63 ns
LVTTL_F_8
1.04 1.04 1.05 1.06 1.97 1.97 2.22 2.23 1.97 1.97 2.22 2.23 ns
LVTTL_S_12
1.04 1.04 1.05 1.06 1.90 1.90 2.19 2.19 1.96 1.97 2.19 2.19 ns
LVTTL_S_16
1.04 1.04 1.05 1.06 2.07 2.07 2.40 2.40 2.07 2.07 2.40 2.40 ns
LVTTL_S_4
1.04 1.04 1.05 1.06 3.23 3.23 3.67 3.67 3.23 3.23 3.67 3.67 ns
LVTTL_S_8
1.04 1.04 1.05 1.06 2.22 2.22 2.47 2.47 2.22 2.37 2.50 2.51 ns
MINI_LVDS_25
0.45 0.58 0.62 0.63 0.80 0.83 0.95 0.95 105.74 105.74 105.85 105.85 ns
PPDS_25
0.45 0.58 0.62 0.63 0.80 0.83 0.95 0.95 105.74 105.74 105.85 105.85 ns
RSDS_25
0.45 0.58 0.62 0.63 0.80 0.83 0.95 0.95 105.74 105.74 105.85 105.85 ns
SLVS_400_25
0.45 0.58 0.62 0.63 N/A N/A N/A N/A N/A N/A N/A N/A ns
SSTL12_F
0.52 0.55 0.59 0.59 0.72 0.72 0.91 0.91 0.83 0.83 1.04 1.04 ns
SSTL12_S
0.52 0.55 0.59 0.59 0.78 0.78 0.97 0.98 0.88 0.88 1.11 1.11 ns
SSTL135_F
0.52 0.55 0.59 0.59 0.72 0.72 0.90 0.91 0.88 0.89 1.11 1.11 ns
SSTL135_S
0.52 0.55 0.59 0.59 0.77 0.77 0.97 0.97 0.94 0.94 1.18 1.18 ns
SSTL135_R_F
0.52 0.55 0.59 0.59 0.74 0.74 0.93 0.93 0.85 0.86 1.08 1.08 ns
SSTL135_R_S
0.52 0.55 0.59 0.59 0.82 0.82 1.02 1.03 0.95 0.96 1.19 1.19 ns
SSTL15_F
0.52 0.55 0.59 0.59 0.68 0.68 0.87 0.87 0.83 0.84 1.07 1.07 ns
SSTL15_S
0.52 0.55 0.59 0.59 0.80 0.80 1.00 1.01 0.98 0.99 1.23 1.23 ns
SSTL15_R_F
0.52 0.55 0.59 0.59 0.75 0.75 0.94 0.94 0.88 0.89 1.11 1.11 ns
SSTL15_R_S
0.52 0.55 0.59 0.59 0.83 0.83 1.04 1.04 0.95 0.96 1.20 1.21 ns
SSTL18_I_F
0.52 0.55 0.59 0.59 0.76 0.76 0.96 0.96 0.94 0.95 1.21 1.21 ns
SSTL18_I_S
0.52 0.55 0.59 0.59 0.88 0.88 1.08 1.08 0.88 0.88 1.08 1.08 ns
SSTL18_II_F
0.52 0.55 0.59 0.59 0.73 0.73 0.92 0.92 0.89 0.90 1.14 1.14 ns
SSTL18_II_S
0.52 0.55 0.59 0.59 0.85 0.85 1.05 1.05 1.01 1.06 1.32 1.32 ns
SUB_LVDS
0.45 0.58 0.62 0.63 0.80 0.83 0.95 0.95 105.74 105.74 105.85 105.85 ns
TMDS_33
0.57 0.65 0.73 0.74 0.80 0.83 0.95 0.95 105.74 105.74 105.85 105.85 ns
DS892 (v1.12) April 1, 2016
Product Specification
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