DS892 Datasheet, PDF (76/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Date
10/12/2015
09/22/2015
08/03/2015
05/12/2015
Version
1.9
1.8
1.7
1.6
Description of Revisions
Updated data in Table 6 (XCKU025, XCKU085, and XCKU095) and Table 7 (XCKU095).
Updated the description in Power-On/Off Power Supply Sequencing.
Updated Table 21 and Table 22 to production release of the following devices/speed
grades.
XCKU025: -1C/-1I and -2E/-2I devices
XCKU035: -1LI (0.95V) and -1LI (0.90V)
XCKU040: -1LI (0.95V) and -1LI (0.90V)
XCKU060: -1LI (0.95V)
XCKU085: -1C/-1I and -2E/-2I devices
XCKU095: -1C/-1I and -2E/-2I devices
Updated Table 20, Table 21, Table 22, Table 32, Table 33, Table 34, Table 38 through
Table 43, and Table 86 with speed specifications for Vivado Design Suite 2015.3.
Updated Table 45 with package skew data.
Added protocols to Table 57. Updated V_CMOUTDC in Table 64. Added data to Table 72 and
Table 73.
Added Startup Timing to Table 86.
Added GTY tables to support the XCKU095. Added the XCKU025 device.
In Table 2, revised the -1L (0.90V) V_CCINT and V_{CCINT_IO} for a recommended ±20mV
power supply operating range. Updated description of I_CCADC.
Updated Table 21 and Table 22 to production release of the -1 and -2 speed grade
XCKU115 devices and production release of the -3 speed grade for the XCKU035 and
XCKU040 devices.
Updated Table 20, Table 21, Table 22, Table 32, Table 34, Table 38 through Table 43, and
Table 86 with speed specifications for Vivado Design Suite 2015.2.1.
Updated Table 26 with more delineated values including adding package variations.
In Table 45 added the XCKU095 FFVA1156 package and updated skew values.
Updated protocols in Table 57.
Revised the values in Table 80 and removed Note 1. Updated Table 83: Sample rate.
In Table 86, added further delineation between devices (SLR-based, XCKU095, and all
other devices), added values by speed grade, and updated -1L specifications.
Updated and added device information in Table 7. In Table 18 and Table 19 updated
Note 2, Note 3, and Note 4.
Updated Table 21 and Table 22 to production release of the -1 and -2 speed grade
XCKU060 devices.
Updated Table 20, Table 21, Table 22, Table 32, Table 34, Table 38 through Table 43, and
Table 86 with speed specifications for Vivado Design Suite 2015.2 v1.17.
Added Table 52: GTH Transceiver Reference Clock Oscillator Selection Phase Noise Mask.
Added the GTH Transceiver Electrical Compliance section.
Revised F_CORECLK and Note 1 in Table 82. Updated the STARTUPE3 Ports descriptions in
Table 86. Updated Note 1 in Table 87.
The minimum software requirements changed for KU040 requiring Vivado Design Suite
2015.1 v1.15 per the design advisory answer record AR64347: Design Advisory for
UltraScale Speed Specification - 2015.1 Production Speed Specification Changes. This
includes revisions to Table 20, Table 21, Table 22, Table 27, Table 28, and Table 38 to
Table 43. Also, in Table 29, revised the HR I/O values for T_{OUTBUF_DELAY_TE_PAD} and added
Note 1.
Updated Table 21 and Table 22 to production release of the XCKU035 devices in the
FBVA676 and FFVA1156 packages. Added Note 2 to Table 3. Clarifying edits to Table 30
and Table 31. Added Note 1 to Table 80. Updated the On-Chip Sensor Accuracy in
Table 83. In Table 86, added more specifications to the STARTUPE3 Ports section.
DS892 (v1.12) April 1, 2016
Product Specification
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