DS892 Datasheet, PDF (69/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Integrated Interface Block for PCI Express Designs
More information and documentation on solutions for PCI Express designs can be found at PCI Express.
Table 82: Maximum Performance for PCI Express Designs
Symbol
Description
Speed Grades and V_CCINT Operating Voltages
1.0V
0.95V
0.90V
Units
-3
-2
-1
-1L
-1L
F_PIPECLK
F_CORECLK
F_USERCLK
F_DRPCLK
Pipe clock maximum frequency
Core clock maximum frequency
User clock maximum frequency
DRP clock maximum frequency
250.00
500.00
250.00
250.00
250.00
500.00
250.00
250.00
250.00
500.00⁽¹⁾
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
MHz
MHz
MHz
MHz
Notes:
1. PCI Express x8 Gen 3 operation is supported in -2 and -3 speed grades. Refer to the UltraScale Architecture Gen3
Integrated Block for PCI Express v4.0 User Guide (PG156) for information regarding x8 Gen 3 operation in the -1 speed
grade.
System Monitor Specifications
Table 83: SYSMON Specifications
Parameter
Symbol
Comments/Conditions
Min Typ Max Units
V_CCADC = 1.8V ±3%, V_REFP = 1.25V, V_REFN = 0V, ADCCLK = 5.2 MHz, T_j = –40°C to 100°C, typical values at T_j = 40°C
ADC Accuracy⁽¹⁾
Resolution
10
–
–
Bits
Integral nonlinearity⁽²⁾
INL
–
–
±2
LSBs
Differential nonlinearity
DNL
No missing codes, guaranteed
monotonic
–
–
±1
LSBs
Offset error
Offset calibration enabled
–
–
±2
LSBs
Gain error
–
–
±0.4
%
Sample rate
–
–
0.2
MS/s
RMS code noise
External 1.25V reference
On-chip reference
–
–
1
LSBs
–
1
–
LSBs
ADC Accuracy at Extended Temperatures
Resolution
Integral nonlinearity
Differential nonlinearity
INL
DNL
T_j = –55°C to 125°C
T_j = –55°C to 125°C
No missing codes, guaranteed
monotonic
T_j = –55°C to 125°C
10
–
–
Bits
–
–
±2
LSBs
–
–
±1
DS892 (v1.12) April 1, 2016
Product Specification
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