DS892 Datasheet, PDF (59/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
GTY Transceiver Switching Characteristics for the XCKU095
Consult www.xilinx.com/products/technology/high-speed-serial for further information.
Table 66: GTY Transceiver Performance
Symbol
Description
Output
Divider
XCKU095 Speed Grades and Temperature
Range
-2E, -2I
-1C, -1I
F_GTYMAX
F_GTYMIN
GTY maximum line rate
GTY minimum line rate
16.375
0.5
Min
Max
12.5
0.5
Min
Max
1
4.0
12.5
4.0
8.5
F_GTYCRANGE CPLL line rate range⁽¹⁾
2
2.0
4
1.0
6.25
3.125
2.0
4.25
1.0
2.125
8
0.5
1.5625
0.5
1.0625
F_GTYQRANGE1 QPLL0 line rate range
1⁽²⁾
2⁽²⁾
4⁽²⁾
8⁽²⁾
16⁽²⁾
Min
9.8
4.9
2.45
1.225
0.6125
Max
16.375
8.1875
4.09375
2.04688
1.02344
Min
9.8
4.9
2.45
1.225
0.6125
Max
12.5
8.1875
4.09375
2.04688
1.02344
F_GTYQRANGE2 QPLL1 line rate range
Min
1⁽³⁾
8.0
2⁽³⁾
4.0
4⁽³⁾
2.0
8⁽³⁾
1.0
16⁽³⁾
0.5
Max
13.0
6.5
3.25
1.625
0.8125
Min
Max
8.0
12.5
4.0
6.5
2.0
3.25
1.0
1.625
0.5
0.8125
Min
Max
Min
Max
F_CPLLRANGE
F_QPLL0RANGE
F_QPLL1RANGE
CPLL frequency range
QPLL0 frequency range
QPLL1 frequency range
2.0
6.25
2.0
4.25
9.8
16.375
9.8
16.375
8.0
13.0
8.0
13.0
Notes:
1. The values listed are the rounded results of the calculated equation (2 x CPLL_Frequency)/Output_Divider.
2. The values listed are rounded results from calculated equation (QPLL0_Frequency)/Output_Divider.
3. The values listed are rounded results from calculated equation (QPLL1_Frequency)/Output_Divider.
Units
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
Gb/s
GHz
GHz
GHz
Table 67: GTY Transceiver Dynamic Reconfiguration Port (DRP) Switching Characteristics
Symbol
Description
XCKU095
Units
F_GTYDRPCLK GTYDRPCLK maximum frequency
250
MHz
DS892 (v1.12) April 1, 2016
Product Specification
www.xilinx.com
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