DS892 Datasheet, PDF (70/79 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Table 83: SYSMON Specifications (Cont’d)
Parameter
Symbol
Comments/Conditions
Min Typ Max Units
Analog Inputs⁽²⁾
Unipolar operation
0
–
1
V
ADC input ranges
Bipolar operation
–0.5
–
+0.5
V
Unipolar common mode range (FS input) 0
–
+0.5
V
Bipolar common mode range (FS input) +0.5
–
+0.6
V
Maximum external channel input
ranges
Adjacent channels set within these
ranges should not corrupt
measurements on adjacent channels
–0.1
–
V_CCADC
V
On-Chip Sensor Accuracy
Temperature sensor error⁽¹⁾
Supply sensor error⁽³⁾
Conversion Rate⁽⁴⁾
T_j = –40°C to 100°C (with external REF)
–
T_j = –55°C to 125°C (with external REF)
–
T_j = –40°C to 100°C (with internal REF)
–
T_j = –55°C to 125°C (with internal REF)
–
T_j = –40°C to 100°C (with external REF)
–
T_j = –55°C to 125°C (with external REF)
–
T_j = –40°C to 100°C (with internal REF)
–
T_j = –55°C to 125°C (with internal REF)
–
–
±4
°C
–
±4.5
°C
–
±5
°C
–
±6.5
°C
–
±1
%
–
±2
%
–
±1.5
%
–
±2.5
%
Conversion time—continuous t_CONV
Conversion time—event
t_CONV
DRP clock frequency
DCLK
Number of ADCCLK cycles
Number of ADCCLK cycles
DRP clock frequency
26
–
32
Cycles
–
–
21
Cycles
8
–
250
MHz
ADC clock frequency
ADCCLK Derived from DCLK
1
–
5.2
MHz
DCLK duty cycle
40
–
60
%
SYSMON Reference⁽⁵⁾
External reference
On-chip reference
V_REFP Externally supplied reference voltage
1.20 1.25 1.30
V
Ground V_REFP pin to AGND,
-2 and -3 speed grade
T_j = –40°C to 100°C
1.2375 1.25 1.2625
V
Ground V_REFP pin to AGND,
-1 and -1L speed grade
T_j = –40°C to 100°C
1.23125 1.25 1.26875
V
Ground V_REFP pin to AGND,
T_j = –55°C to 125°C
1.225 1.25 1.275
V
Notes:
1. ADC offset errors are removed by enabling the ADC automatic offset calibration feature. The values are specified for when
this feature is enabled.
2. See the Analog Input section in the UltraScale Architecture System Monitor User Guide (UG580).
3. Supply sensor offset and gain errors are removed by enabling the automatic offset and gain calibration feature. The values
are specified for when this feature is enabled.
4. See the Adjusting the Acquisition Settling Time section in the UltraScale Architecture System Monitor User Guide (UG580).
5.
Any variation
ideal transfer
in the reference voltage from the nominal
function. This also impacts the accuracy of
Vth_{REeFPin=ter1n.a2l5sVenansodr}
Vm_{REeFaNsu=re0mVewnitlsl}
result in a deviation from the
(i.e., temperature and power
supply). However, for external ratiometric type applications allowing reference to vary by ±4% is permitted.
DS892 (v1.12) April 1, 2016
Product Specification
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