XQ5VLX30T Datasheet, PDF (42/74 Pages) Xilinx, Inc – Virtex-5Q FPGA Data Sheet

Virtex-5Q FPGA Data Sheet: DC and Switching Characteristics
CLB Distributed RAM Switching Characteristics (SLICEM Only)
Table 66: CLB Distributed RAM Switching Characteristics
Symbol
Description
Speed Grade
-2I
-1I
-1M
Units
Sequential Delays
T_SHCKO
Clock to A – B outputs
T_{SHCKO_1}
Clock to AMUX – BMUX outputs
Setup and Hold Times Before/After Clock CLK
1.26
1.54
1.54
ns, Max
1.38
1.68
1.68
ns, Max
T_DS/T_DH
A – D inputs to CLK
0.84
1.03
1.03
ns, Min
0.22
0.26
0.26
T_AS/T_AH
Address An inputs to clock
0.46
0.54
0.54
ns, Min
0.22
0.27
0.27
T_WS/T_WH
WE input to clock
0.39
–0.04
0.46
–0.02
0.46
–0.02
ns, Min
T_CECK/T_CKCE
CE input to CLK
0.42
–0.07
0.51
–0.06
0.51
–0.06
ns, Min
Clock CLK
T_MPW
T_MCP
Minimum pulse width
Minimum clock period
0.82
1.00
1.00
ns, Min
1.64
2.00
2.00
ns, Min
Notes:
1. A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values cannot be guaranteed “best-case”, but if a “0” is
listed, there is no positive hold time.
2. T_SHCKO also represents the CLK to XMUX output. Refer to TRACE report for the CLK to XMUX path.
CLB Shift Register Switching Characteristics (SLICEM Only)
Table 67: CLB Shift Register Switching Characteristics
Symbol
Description
Speed Grade
-2I
-1I
-1M
Units
Sequential Delays
T_REG
Clock to A – D outputs
T_{REG_MUX}
Clock to AMUX – DMUX output
T_{REG_M31}
Clock to DMUX output via M31 output
Setup and Hold Times Before/After Clock CLK
1.43
1.73
1.73
ns, Max
1.55
1.87
1.87
ns, Max
1.15
1.38
1.38
ns, Max
T_WS/T_WH
WE input
0.24
–0.04
0.29
–0.02
0.29
–0.02
ns, Min
T_CECK/T_CKCE
CE input to CLK
0.27
–0.07
0.33
–0.06
0.33
–0.06
ns, Min
T_DS/T_DH
A – D inputs to CLK
0.66
0.09
0.78
0.11
0.78
0.11
ns, Min
Clock CLK
T_MPW
Minimum pulse width
0.70
0.85
0.85
ns, Min
Notes:
1. A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values cannot be guaranteed “best-case”, but if a “0” is
listed, there is no positive hold time.
DS714 (v2.1) July 23, 2010
www.xilinx.com
Product Specification
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