XQ5VLX30T Datasheet, PDF (19/74 Pages) Xilinx, Inc – Virtex-5Q FPGA Data Sheet

Virtex-5Q FPGA Data Sheet: DC and Switching Characteristics
Table 39: GTX_DUAL Tile Quiescent Supply Current
Symbol
Description
Typ⁽¹⁾
Max Units
I_AVTTTXQ
I_AVCCPLLQ
I_AVTTRXQ
Quiescent MGTAVTTTX (transmitter termination) supply current
Quiescent MGTAVCCPLL (PLL) supply current
Quiescent MGTAVTTRX (receiver termination) supply current. Includes
MGTAVTTRXCQ.
8.2
21.6
mA
0.8
4.8
mA
1.2
12.0
mA
I_AVCCQ
Quiescent MGTAVCC (analog) supply current
9.0
50.4
mA
Notes:
1. Typical values are specified at nominal voltage, 25°C.
2. Device powered and unconfigured.
3. Currents for conditions other than values specified in this table can be obtained by using the XPOWER Estimator (XPE) or XPOWER
Analyzer (XPA) tools.
4. GTX_DUAL tile quiescent supply current for an entire device can be calculated by multiplying the values in this table by the number
of available GTX_DUAL tiles in the target FXT device.
GTX_DUAL Tile DC Input and Output Levels
Table 40 summarizes the DC output specifications of the GTX_DUAL tiles in Virtex-5Q FPGAs. Figure 6, page 20 shows the
single-ended output voltage swing. Figure 7, page 20 shows the peak-to-peak differential output voltage.
Consult Virtex-5 FPGA RocketIO GTX Transceiver User Guide for further details.
Table 40: GTX_DUAL Tile DC Specifications
Symbol
DC Parameter
Conditions
Min Typ
Max
Units
DV_PPIN
External AC coupled
Differential peak-to-peak input _{≤ 4.25 Gb/s}
200
voltage
External AC coupled > 4.25 Gb/s 125
1800
mV
1800
mV
V_IN
Absolute input voltage
DC coupled
MGTAVTTRX = 1.2V
–400
MGTAVTTRX +400
up to 1320
mV
V_CMIN
Common mode input voltage
DC coupled
MGTAVTTRX = 1.2V
800
mV
DV_PPOUT
Differential peak-to-peak
output voltage⁽¹⁾
TXBUFDIFFCTRL = 111
1400
mV
V_SEOUT
Single-ended output voltage
swing ⁽¹⁾
TXBUFDIFFCTRL = 111
700
mV
V_CMOUT
Common mode output voltage
Equation based
MGTAVTTTX = 1.2V
1200 – DV_PPOUT/2
mV
R_IN
R_OUT
T_OSKEW
C_EXT
Differential input resistance
Differential output resistance
Transmitter output skew
Recommended external AC coupling capacitor⁽²⁾
85
100
120
Ω
85
100
120
Ω
2
8
ps
75
100
200
nF
Notes:
1. The output swing and preemphasis levels are programmable using the attributes discussed in Virtex-5 FPGA RocketIO GTX Transceiver
User Guide and can result in values lower than reported in this table.
2. Values outside of this range can be used as appropriate to conform to specific protocols and standards.
DS714 (v2.1) July 23, 2010
www.xilinx.com
Product Specification
19