XQ5VLX30T Datasheet, PDF (10/74 Pages) Xilinx, Inc – Virtex-5Q FPGA Data Sheet

Virtex-5Q FPGA Data Sheet: DC and Switching Characteristics
Table 17: Processor Block DMA0 Switching Characteristics
Clock Name
Reference Clock
Clock-to-out and setup relative to clock
T_{CK_CONTROL}
T_{CK_DATA}
T_{CONTROL_CK}
T_{DATA_CK}
CPMDMA0LLCLK
CPMDMA0LLCLK
CPMDMA0LLCLK
CPMDMA0LLCLK
Table 18: Processor Block DMA1 Switching Characteristics
Clock Name
Reference Clock
Clock-to-out and setup relative to clock
T_{CK_CONTROL}
T_{CK_DATA}
T_{CONTROL_CK}
T_{DATA_CK}
CPMDMA1LLCLK
CPMDMA1LLCLK
CPMDMA1LLCLK
CPMDMA1LLCLK
Table 19: Processor Block DMA2 Switching Characteristics
Clock Name
Reference Clock
Clock-to-out and setup relative to clock
T_{CK_CONTROL}
T_{CK_DATA}
T_{CONTROL_CK}
T_{DATA_CK}
CPMDMA2LLCLK
CPMDMA2LLCLK
CPMDMA2LLCLK
CPMDMA2LLCLK
Table 20: Processor Block DMA3 Switching Characteristics
Clock Name
Reference Clock
Clock-to-out and setup relative to clock
T_{CK_CONTROL}
T_{CK_DATA}
T_{CONTROL_CK}
T_{DATA_CK}
CPMDMA3LLCLK
CPMDMA3LLCLK
CPMDMA3LLCLK
CPMDMA3LLCLK
Table 21: Processor Block DCR Switching Characteristics
Clock Name
Reference Clock
Clock-to-out and setup relative to clock
T_{CK_CONTROL}
T_{CK_ADDRESS}
T_{CK_DATA}
T_{CONTROL_CK}
T_{ADDRESS_CK}
T_{DATA_CK}
CPMDCRCLK
CPMDCRCLK
CPMDCRCLK
CPMDCRCLK
CPMDCRCLK
CPMDCRCLK
Speed Grade
-2I
-1I
-1M
Units
1.42
1.665
1.665
ps
1.472
1.712
1.712
ps
0.558
0.716
0.716
ps
–0.105 –0.104 –0.104 ps
Speed Grade
-2I
-1I
-1M
Units
1.266
1.474
1.474
ps
1.418
1.645
1.645
ps
0.555
0.717
0.717
ps
0.01
0.046
0.046
ps
Speed Grade
-2I
-1I
-1M
Units
1.235
1.437
1.437
ps
1.262
1.463
1.463
ps
0.924
1.155
1.155
ps
0.142
0.168
0.168
ps
Speed Grade
-2I
-1I
-1M
Units
1.242
1.462
1.462
ps
1.184
1.376
1.376
ps
0.767
0.965
0.965
ps
0.119
0.116
0.116
ps
Speed Grade
-2I
-1I
-1M
Units
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
DS714 (v2.1) July 23, 2010
www.xilinx.com
Product Specification
10