DS580 Datasheet, PDF (21/42 Pages) Xilinx, Inc – Optional MDIO interface for PHY access

LogiCORE IP XPS Ethernet Lite Media Access Controller
Table 11: XPS Ethernet Lite MAC Memory Map (Cont’d)
Address Offset
Parameter Dependency
0x7E4
0x7E8
0x7EC
MDIO Registers^[1]
0x07F0
0x07F4
0x07F8
Transmit Register
0x07FC
0x0800
0x0804
0x0808
0x080C
0x0810 - 0x0FE0
0x0FE4 - 0x0FF0
0x0FF4
0x0FF8
0x0FFC
0x1000
0x1004
0x1008
0x100C
0x1010 - 0x17E0
0x17E4 - 0x17F8
0x17FC
Tx PONG Buffer
C_TX_PING_PONG = '1' else
unused
Rx PING Buffer
C_RX_PING_PONG = '0' or '1'
Memory Location Function
MDIO Address
MDIO Write Data
MDIO Read Data
MDIO Control
Packet Length
Global Interrupt Enable
Control
Destination Address Bytes 0 - 3
or
MAC Address Bytes 0 - 3
Destination Address Bytes 4 - 5
Source Address Bytes 0 - 1
or
MAC Address Bytes 4 - 5
Source Address Bytes 2 - 5
Type/Length Field
Data Field Bytes 0 - 1
Remaining Data Field Bytes
Reserved
Packet Length
Reserved
Control
Destination Address Bytes 0 - 3
Destination Address Bytes 0 - 3
Source Address Bytes 4 - 5
Source Address Bytes 2 - 5
Type/Length Field
Data Field Bytes 0 - 1
Remaining Data and CRC Field Bytes
Reserved
Control
DS580 September 21, 2010
www.xilinx.com
21
Product Specification