K4N26323AE Datasheet, PDF (8/52 Pages) Samsung semiconductor – 128Mbit GDDR2 SDRAM

K4N26323AE-GC
BLOCK DIAGRAM (1Mbit x 32I/O x 4 Bank)
DQS , DQS
128M GDDR2 SDRAM
CK, CK
Input DLL
Bank Select
Input Buffer
32
Input Buffer
Data Input Register
Serial to parallel
128
LWE
LDMi
iCK
ADDR
1M x 32
1M x 32
1M x 32
1M x 32
128
32
x32
DQi
Column Decoder
Latency & Burst Length
LCKE
LRAS LCBR LWE
LCAS
Programming Register
LWCBR
Timing Register
Output
DLL
CK,CK
LDMi
DQS, DQS
iCK CKE CS RAS CAS WE DMi
* iCK : internal clock
-8-
Rev. 1.7 (Jan. 2003)