K4N26323AE Datasheet, PDF (2/52 Pages) Samsung semiconductor – 128Mbit GDDR2 SDRAM

K4N26323AE-GC
128M GDDR2 SDRAM
Revision History
Revision 1.7 (January 23, 2003)
- Changed the device name from GDDR-II to GDDR2
Revision 1.6 (December 18, 2002)
- Typo corrected
Revision 1.5 (December 4, 2002)
- Typo corrected
Revision 1.4 (November 12, 2002)
- Changed the device name from DDR-II to GDDR-II
- Typo corrected
Revision 1.3 (November 8, 2002)
- Typo corrected
Revision 1.2 (November 5, 2002)
- Typo corrected
- Changed the Icc6 from 3mA to 7mA
Revision 1.1 (October 30, 2002)
- Typo corrected
Revision 1.0 (September 30, 2002)
- Changed tCK(max) from 4.5ns to 4.0ns
Revision 0.7 (September 12, 2002)
- Added IBIS curve in the spec
- Defined DC spec
- Typo corrected
- Defined Burst Write with AP (AL=0) Table.
- Defined On-die Termination Status of 2Banks System Table.
- Changed CIN1,CIN2,CIN3,Cout and CiN4 from 3.5pF to 3.0pF
- Removed CL(Cas Latency) 8 from the spec
- Changed VDD form 2.5V + 5% to 2.5V + 0.1V
- Changed speed bin from 500/400/333MHz to 500/450/400MHz
- Changed EMRS table
Revision 0.6 (February 28, 2002)
- Changed WL(write latency) from RL(read latency) -1 to AL(additive latency) +1
- Changed tIH/tSS during EMRS from 5ns to 0.5tCK
- Changed tRCDWR
- Changed package ball location of CK, /CK, CKE
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Rev. 1.7 (Jan. 2003)