K4N26323AE Datasheet, PDF (33/52 Pages) Samsung semiconductor – 128Mbit GDDR2 SDRAM

K4N26323AE-GC
128M GDDR2 SDRAM
DC CHARACTERISTICS
Recommended operating conditions Unless Otherwise Noted, Tj=0 to 100°C)
Parameter
Symbol
Test Condition
Operating Current
(One Bank Active)
ICC1
Burst Lenth=4 tRC ≥ tRC(min)
IOL=0mA, tCC= tCC(min)
Precharge Standby Current
in Power-down mode
ICC2P
CKE ≤ VIL(max), tCC= tCC(min)
Precharge Standby Current
in Non Power-down mode
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min),
tCC= tCC(min)
Active Standby Current
power-down mode
ICC3P CKE ≤ VIL(max), tCC= tCC(min)
Active Standby Current in
in Non Power-down mode
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min),
tCC= tCC(min)
Operating Current
( Burst Mode)
ICC4
IOL=0mA ,tCC= tCC(min),
Page Burst, All Banks activated.
Refresh Current
ICC5
tRC≥ tRFC
Self Refresh Current
ICC6
CKE ≤ 0.2V
Operating Current
(4Bank interleaving)
ICC7
Burst Lenth=4 tRC ≥ tRC(min)
IOL=0mA, tCC= tCC(min)
Note : 1. Measured with outputs open & On-Die termination off.
2. Refresh period is 16ms.
-20
590
110
230
110
510
1200
370
1400
Version
-22
540
100
210
100
470
1100
350
7
1300
Unit Note
-25
500 mA 1
95
mA
190 mA
95
mA
430 mA
990
330
1180
mA
mA 2
mA
mA
AC INPUT OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to VSS=0V, VDD=2.5V ± 0.1V, VDDQ=1.8V ± 0.1V, Tj=0 to 100 °C)
Parameter
Symbol
Min
Typ
Max
Unit Note
Input High (Logic 1) Voltage; DQ
VIH
VREF+0.25
-
-
V
1
Input Low (Logic 0) Voltage; DQ
VIL
-
-
VREF-0.25
V
2
Clock Input Differential Voltage ; CK and CK
VID
0.5
-
VDDQ+0.6
V
3
Clock Input Crossing Point Voltage ; CK and CK
VIX
0.5*VDDQ-0.2
-
0.5*VDDQ+0.2
V
4
Note : ^{1. VIH(Max) = 4.2V. The overshoot voltage duration is < 3ns at VDD.}
VIH level should be met at the pin of DRAM when ODT=ON.
2. VIL(Min) = -1.5V. The undershoot voltage duration is < 3ns at VSS.
VIL level should be met at the pin of DRAM when ODT=ON.
3. VID is the magnitude of the difference between the input level on CK and the input level on CK
4. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the same
Controller
VDDQ
DRAM
ODT of DRAM
Input level should be measured
at this point
- 33 -
VSSQ
Rev. 1.7 (Jan. 2003)