K4N51163QC-ZC Datasheet, PDF (45/64 Pages) Samsung semiconductor – 512Mbit gDDR2 SDRAM

K4N51163QC-ZC
512M gDDR2 SDRAM
Example 4: Burst Read Operation Followed by Precharge :
RL = 6, AL = 2, CL = 4, BL = 4, t_RTP <= 2 clocks
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK/CK
CMD ^{Post CAS}
READ A
DQS
DQ’s
NOP
NOP
AL + BL/2 Clks
NOP
Precharge A
NOP
NOP
Bank A
Activate
NOP
AL = 2
RL = 6
CL =4
> = t_RAS
> = t_RTP
> = t_RP
CL =4
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃
Example 5: Burst Read Operation Followed by Precharge :
RL = 4, AL = 0, CL = 4, BL = 8, t_RTP > 2 clocks
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK/CK
CMD ^{Post CAS}
READ A
DQS
NOP
NOP
NOP
AL + 2 Clks + max{tRTP;2 tCK}*
NOP
Precharge A
NOP
NOP
Bank A
Activate
AL = 0
DQ’s
CL =4
RL = 4
first 4-bit prefetch
> = t_RP
> = t_RAS
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃ DOUT A₄ DOUT A₅ DOUT A₆ DOUT A₈
> = t_RTP
second 4-bit prefetch
* : rounded to next integer
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Rev 1.5 Oct. 2005