K4N51163QC-ZC Datasheet, PDF (32/64 Pages) Samsung semiconductor – 512Mbit gDDR2 SDRAM

K4N51163QC-ZC
ODT timing mode switch at exiting power down mode
T0
T1
T4
T5
CK
CK
tIS
CKE
VIH(AC)
T6
T7
tAXPD
512M gDDR2 SDRAM
T8
T9
T10 T11
Exiting from Slow Active Power Down Mode
or Precharge Power Down Mode.
Active & Standby mode
timings to be applied.
ODT
Internal
Term Res.
Power Down mode tim-
ings to be applied.
ODT
Internal
Term Res.
tIS
V_IL(AC)
tAOFD
RTT
tIS
V_IL(AC)
tAOFPDmax
RTT
tIS
Active & Standby mode
timings to be applied.
ODT
Internal
Term Res.
Power Down mode tim-
ings to be applied.
ODT
Internal
Term Res.
V_IH(AC)
tAOND
tIS
VIH(AC)
tAONPDmax
RTT
RTT
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Rev 1.5 Oct. 2005