K4N51163QC-ZC Datasheet, PDF (44/64 Pages) Samsung semiconductor – 512Mbit gDDR2 SDRAM

K4N51163QC-ZC
Example 2: Burst Read Operation Followed by Precharge:
RL = 4, AL = 1, CL = 3, BL = 8, t_RTP <= 2 clocks
512M gDDR2 SDRAM
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK/CK
CMD ^{Post CAS}
READ A
DQS
NOP
NOP
AL + BL/2 clks
NOP
DQ’s
AL = 1
CL = 3
RL =4
first 4-bit prefetch
second 4-bit prefetch
Example 3: Burst Read Operation Followed by Precharge :
RL = 5, AL = 2, CL = 3, BL = 4, t_RTP <= 2 clocks
T0
T1
T2
T3
CK/CK
NOP
Precharge A
NOP
NOP
NOP
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃ DOUT A4 DOUT A₅ DOUT A₆ DOUT A₈
> = t_RTP
T4
T5
T6
T7
T8
CMD ^{Posted CAS}
READ A
DQS
DQ’s
NOP
NOP
AL + BL/2 clks
NOP
Precharge A
AL = 2
RL =5
CL =3
> = t_RAS
> = t_RTP
NOP
NOP
Bank A
Activate
> = t_RP
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃
CL =3
NOP
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Rev 1.5 Oct. 2005