K4N51163QC-ZC Datasheet, PDF (43/64 Pages) Samsung semiconductor – 512Mbit gDDR2 SDRAM

K4N51163QC-ZC
512M gDDR2 SDRAM
Precharge Command
The Precharge Command is used to precharge or close a bank that has been activated. The Precharge Command is triggered when
CS, RAS and WE are low and CAS is high at the rising edge of the clock. The Precharge Command can be used to precharge each
bank independently or all banks simultaneously. Three address bits A10, BA0 and BA1 for 256Mb are used to define which bank to pre-
charge when the command is issued.
Bank Selection for Precharge by Address Bits
A10
LOW
LOW
LOW
LOW
HIGH
BA1
LOW
LOW
HIGH
HIGH
DON’T CARE
BA0
LOW
HIGH
LOW
HIGH
DON’T CARE
Precharged
Bank(s)
Bank 0 only
Bank 1 only
Bank 2 only
Bank 3 only
All Banks
Remarks
Burst Read Operation Followed by Precharge
Minimum Read to precharge command spacing to the same bank = AL + BL/2 clocks.
For the earliest possible precharge, the precharge command may be issued on the rising edge which is “Additive latency(AL) + BL/2
clocks” after a Read command. A new bank active (command) may be issued to the same bank after the RAS precharge time (t_RP). A
precharge command cannot be issued until t_RAS is satisfied.
The minimum Read to Precharge spacing has also to satisfy a minimum analog time from the rising clock edge that initiates the last 4-
bit prefetch of a Read to Precharge command. This time is called tRTP (Read to Precharge). For BL = 4 this is the time from the actual
read (AL after the Read command) to Precharge command. For BL = 8 this is the time from AL + 2 clocks after the Read to the Pre-
charge command.
Example 1: Burst Read Operation Followed by Precharge:
RL = 4, AL = 1, CL = 3, BL = 4, t_RTP <= 2 clocks
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK/CK
CMD
Post CAS
READ A
DQS
NOP
NOP
AL + BL/2 clks
Precharge
DQ’s
AL = 1
CL = 3
RL =4
> = t_RAS
> = t_RTP
NOP
NOP
NOP
> = t_RP
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃
CL =3
Bank A
Active
NOP
- 43 -
Rev 1.5 Oct. 2005