K4N51163QC-ZC Datasheet, PDF (19/64 Pages) Samsung semiconductor – 512Mbit gDDR2 SDRAM

K4N51163QC-ZC
512M gDDR2 SDRAM
Functional Description
Simplified State Diagram
OCD
calibration
Setting
MRS
EMRS
Initialization
Sequence
CKEL
Self
Refreshing
SRF
PR
CKEH
(E)MRS
Idle
All banks
precharged
REF
ACT
CKEL
CKEH
Precharge
Power
Down
Refreshing
CKEL
CKEL
Active
Power
Down
Write
Writing
CKEL
Activating
CKEH
CKEL
Write
Bank
Active
WRA
RDA
Read
Write
Read
CKEL
Read
Reading
WRA
Writing
with
Autoprecharge
WRA
RDA
PR, PRA
PR, PRA
PR, PRA
RDA
Reading
with
Autoprecharge
Automatic Sequence
Command Sequence
Precharging
CKEL = CKE low, enter Power Down
CKEH = CKE high, exit Power Down, exit Self Refresh
ACT = Activate
WR(A) = Write (with Autoprecharge)
RD(A) = Read (with Autoprecharge)
PR(A) = Precharge (All)
(E)MRS = (Extended) Mode Register Set
SRF = Enter Self Refresh
REF = Refresh
Note : Use caution with this diagram. It is indented to provide a floorplan of the possible state transitions and the commands to control
them, not all details. In particular situations involving more than one bank, enabling/disabling on-die termination, Power Down entry/
exit - among other things - are not captured in full detail.
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Rev 1.5 Oct. 2005