K4N51163QC-ZC Datasheet, PDF (31/64 Pages) Samsung semiconductor – 512Mbit gDDR2 SDRAM

K4N51163QC-ZC
ODT timing mode switch at entering power down mode
T-5
T-4
T-3
T-2
T-1
CK
CK
tANPD
CKE
Entering Slow Exit Active Power Down Mode
or Precharge Power Down Mode.
T0
tIS
ODT
Internal
Term Res.
ODT
Internal
Term Res.
tIS
VIL(AC)
tAOFD
RTT
tIS
VIL(AC)
tAOFPDmax
RTT
512M gDDR2 SDRAM
T1
T2
T3
T4
Active & Standby mode
timings to be applied.
Power Down mode tim-
ings to be applied.
ODT
Internal
Term Res.
ODT
Internal
Term Res.
tIS
VIH(AC)
tAOND
tIS
VIH(AC)
tAONPDmax
RTT
RTT
Active & Standby mode
timings to be applied.
Power Down mode tim-
ings to be applied.
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Rev 1.5 Oct. 2005