K4N51163QC-ZC Datasheet, PDF (11/64 Pages) Samsung semiconductor – 512Mbit gDDR2 SDRAM

K4N51163QC-ZC
512M gDDR2 SDRAM
9.3 Timing Parameters by Speed Grade
Parameter
DQ output access time from CK/CK
DQS output access time from CK/CK
CK high-level width
CK low-level width
- 25
Symbol
min max
tAC _-400
tDQSCK _-350
+400
+350
tCH _{0.45 0.55}
tCL _{0.45 0.55}
CK half period
tHP ^min(tCL, _x
tCH)
Clock cycle time, CL= x
tCK _{2500 8000}
DQ and DM input hold time
tDH ₁₂₅
x
DQ and DM input setup time
tDS
50
x
Control & Address input pulse width for
each input
tIPW
0.6
x
DQ and DM input pulse width for each
input
tDIPW
0.35
x
Data-out high-impedance time from CK/
CK
tHZ
x
tAC
max
DQS low-impedance time from CK/CK
tLZ
(DQS)
tAC
min
tAC
max
DQ low-impedance time from CK/CK tLZ(DQ) ^{2*tAC tAC}
min max
DQS-DQ skew for DQS and associated
DQ signals
tDQSQ
x
200
DQ hold skew factor
tQHS
x
300
DQ/DQS output hold time from DQS
Write command to first DQS latching
transition
tQH ^{tHP -}
tQHS
x
tDQSS _{-0.25 0.25}
DQS input high pulse width
tDQSH _0.35
x
DQS input low pulse width
DQS falling edge to CK setup time
tDQSL _0.35
x
tDSS _0.2
x
DQS falling edge hold time from CK
tDSH _0.2
x
Mode register set command cycle time tMRD
2
x
Write postamble
tWPST _0.4
0.6
Write preamble
tWPRE _0.35
x
Address and control input hold time
tIH
250
x
Address and control input setup time
tIS
175
x
Read preamble
tRPRE _0.9
1.1
Read postamble
tRPST _0.4
0.6
Active to active command period for
1KB page size products
tRRD _7.5
x
Active to active command period for
2KB page size products
tRRD ₁₀
x
(Refer to notes for informations related to this table at the bottom)
- 2A
min max
- 33
min max
- 36
Units Notes
min max
-450 +450 -470 +470 -500 +500 ps
-400 +400 -420 +420 -450 +450 ps
0.45 0.55 0.45 0.55 0.45 0.55 tCK
0.45 0.55 0.45 0.55 0.45 0.55 tCK
min
(tCL,
tCH)
min
x (tCL,
tCH)
min
x (tCL, x
tCH)
ps 20,21
2.86 8.0 3.3 8.0 3.6 8.0 ns 24
175
x
195
x
225
x
ps
15,16,
17
50
x
70
x
100
x
ps
15,16,
17
0.6
x
0.6
x
0.6
x tCK
0.35 x
0.35 x
0.35
x tCK
x
tAC
max
x
tAC
max
x
tAC
max
ps
tAC
min
tAC
max
tAC
min
tAC
max
tAC
min
tAC
max
ps
27
2*tAC tAC 2*tAC tAC 2* tAC tAC
min max min max min max
ps
27
x
310
x
320
x
340 ps 22
x
tHP -
tQHS
WL
-0.25
0.35
0.35
0.2
0.2
2
0.4
0.35
325
200
0.9
0.4
410
x
WL
+0.25
x
x
x
x
x
0.6
x
x
x
1.1
0.6
x
tHP -
tQHS
WL
-0.25
0.35
0.35
0.2
0.2
2
0.4
0.35
345
220
0.9
0.4
420
x
WL
+0.25
x
x
x
x
x
0.6
x
x
x
1.1
0.6
x
tHP -
tQHS
WL
-0.25
0.35
0.35
0.2
0.2
2
0.4
0.35
375
250
0.9
0.4
440
x
WL
+0.25
x
x
x
x
x
0.6
x
x
x
1.1
0.6
ps 21
ps
tCK
tCK
tCK
tCK
tCK
tCK
tCK 19
tCK
ps
14,16,
18
ps
14,16,
18
tCK 28
tCK 28
7.5
x
7.5
x
7.5
x ns 12
10
x
10
x
10
x
ns 12
- 11 -
Rev 1.5 Oct. 2005