HD64F7144FW50V Datasheet, PDF (840/932 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144

26. Electrical Characteristics
CK
(Branch trace)
AUDCK (input)
(RAM monitor)
AUDRST
AUDMD
t_cyc
t_RMCYC
t_AUDRSTW
t_AUDMDS
Figure 26.27 AUD Reset Timing
AUDCK
(output)
AUDATA3 to
AUDATA0
(output)
AUDSYNC
(output)
t_BTCKW
t_BTDD
t_BTSD
t_BTCYC
t_BTDH
t_BTSH
Figure 26.28 Branch Trace Timing
AUDCK
(input)
AUDATA3 to
AUDATA0
(output)
AUDATA3 to
AUDATA0
(input)
AUDSYNC
(input)
t_RMCYC
t_RMCKW
t_RMDD
t_RMDHD
t_RMDS
t_RMDH
t_RMSS
t_RMSH
Figure 26.29 RAM Monitor Timing
Rev.4.00 Mar. 27, 2008 Page 794 of 882
REJ09B0108-0400