HD64F7144FW50V Datasheet, PDF (504/932 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144

13. Serial Communication Interface (SCI)
Start
Initialization
Start transmission
No
ERS = 0?
Yes
No
TEND = 1?
Yes
Write data to TDR,
and clear TDRE flag
in SSR to 0
Error processing
No
All data transmitted ?
Yes
No
ERS = 0?
Yes
No
TEND = 1?
Yes
Clear TE bit to 0
Error processing
End
Figure 13.28 Example of Transmit Processing Flow
In smart card interface mode, data reception should be performed in block transfer mode. For
details, refer to section 13.4, Operation in Asynchronous Mode.
Rev.4.00 Mar. 27, 2008 Page 458 of 882
REJ09B0108-0400