HD64F7144FW50V Datasheet, PDF (442/932 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144

13. Serial Communication Interface (SCI)
13.3 Register Descriptions
The SCI has the following registers for each channel. For details on register addresses and register
states during each processing, refer to section 25, List of Registers. The serial mode register
(SMR), serial control register (SCR), and serial status register (SSR) are described separately for
normal serial communication interface mode and smart card interface mode because their bit
functions differ in part.
Channel 0
• Serial mode register_0 (SMR_0)
• Bit rate register_0 (BRR_0)
• Serial control register_0 (SCR_0)
• Transmit data register_0 (TDR_0)
• Transmit shift register_0 (TSR_0)
• Serial status register_0 (SSR_0)
• Receive data register_0 (RDR_0)
• Receive shift register_0 (RSR_0)
• Serial direction control register_0 (SDCR_0)
Channel 1
• Serial mode register_1 (SMR_1)
• Bit rate register_1 (BRR_1)
• Serial control register_1 (SCR_1)
• Transmit data register_1 (TDR_1)
• Transmit shift register_1 (TSR_1)
• Serial status register_1 (SSR_1)
• Receive data register_1 (RDR_1)
• Receive shift register_1 (RSR_1)
• Serial direction control register_1 (SDCR_1)
Rev.4.00 Mar. 27, 2008 Page 396 of 882
REJ09B0108-0400