HD64F7144FW50V Datasheet, PDF (445/932 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144

13. Serial Communication Interface (SCI)
13.3.5 Serial Mode Register (SMR)
SMR is used to set the SCI’s serial transfer format and select the baud rate generator clock source.
Some bit functions of SMR differ between normal serial communication interface mode and smart
card interface mode.
• Normal serial communication interface mode (when SMIF in SDCR is 0)
Bit Bit Name Initial Value R/W Description
7
C/A
0
R/W Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode
6 CHR
0
R/W Character Length (enabled only in asynchronous
mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is fixed
and the MSB (bit 7) of TDR is not transmitted in
transmission.
In clocked synchronous mode, a fixed data length of
8 bits is used.
5 PE
0
R/W Parity Enable (enabled only in asynchronous mode)
When this bit is set to 1, the parity bit is added to
transmit data before transmission, and the parity bit is
checked in reception. For a multiprocessor format,
parity bit addition and checking are not performed
regardless of the PE bit setting.
Rev.4.00 Mar. 27, 2008 Page 399 of 882
REJ09B0108-0400