HD64F7144FW50V Datasheet, PDF (658/932 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144

17. Pin Function Controller (PFC)
17.1.8 Port D Control Registers L1, L2, H1, H2 (PDCRL1, PDCRL2, PDCRH1,
PDCRH2)
The port D control registers L1, L2, H1, and H2 (PDCRL1, PDCRL2, PDCRH1, and PDCRH2)
are 16-bit readable/writable registers that are used to select the multiplexed pin function of the
pins on port D.
• Port D Control Registers L1, L2, H1, and H2 (PDCRL1, PDCRL2, PDCRH1, and PDCRH2)
in SH7144
Register Bit
Initial
Bit Name Value R/W Description
PDCRH1 15 to 0 ⎯
All 0 R/W Reserved
PDCRH2 15 to 0 ⎯
PDCRL2 7 to 0 ⎯
All 0 R/W These bits are always read as 0. The write
All 0 R
value should always be 0.
PDCRL2 15
PDCRL1 15
PD15MD1 0
PD15MD0 0*²
R/W PD15 Mode
R/W Select the function of the PD15/D15/AUDSYNC
pin.
00: PD15 I/O (port)
01: D15 I/O (BSC)
10: AUDSYNC I/O (AUD)*¹
11: Setting prohibited
PDCRL2 14
PDCRL1 14
PD14MD1 0
PD14MD0 0*²
R/W PD14 Mode
R/W Select the function of the PD14/D14/AUDCK
pin.
00: PD14 I/O (port)
01: D14 I/O (BSC)
10: AUDCK I/O (AUD)*¹
11: Setting prohibited
PDCRL2 13
PDCRL1 13
PD13MD1 0
PD13MD0 0*²
R/W PD13 Mode
R/W Select the function of the PD13/D13/AUDMD
pin.
00: PD13 I/O (port)
01: D13 I/O (BSC)
10: AUDMD input (AUD)*¹
11: Setting prohibited
Rev.4.00 Mar. 27, 2008 Page 612 of 882
REJ09B0108-0400