HD64F7144FW50V Datasheet, PDF (273/932 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144

11. Multi-Function Timer Pulse Unit (MTU)
• TIORL_0, TIORL_3, TIORL_4
Bit Bit Name Initial Value R/W
7 IOD3
0
R/W
6 IOD2
0
R/W
5 IOD1
0
R/W
4 IOD0
0
R/W
3 IOC3
0
R/W
2 IOC2
0
R/W
1 IOC1
0
R/W
0 IOC0
0
R/W
Description
I/O Control D0 to D3
Specify the function of TGRD.
See the following tables.
TIORL_0: Table 11.11
TIORL_3: Table 11.15
TIORL_4: Table 11.17
I/O Control C0 to C3
Specify the function of TGRC.
See the following tables.
TIORL_0: Table 11.19
TIORL_3: Table 11.23
TIORL_4: Table 11.25
Rev.4.00 Mar. 27, 2008 Page 227 of 882
REJ09B0108-0400