English
Language : 

SH7125 Datasheet, PDF (566/782 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer
Section 15 Pin Function Controller (PFC)
• Port E Control Register L1 (PECRL1)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
-
PE3 PE3 PE3
MD2 MD1 MD0
-
PE2 PE2 PE2
MD2 MD1 MD0
-
PE1 PE1 PE1
MD2 MD1 MD0
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R
2
1
0
-
PE0 PE0
MD1 MD0
0
0
0
R R/W R/W
Initial
Bit
Bit Name Value R/W Description
15

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
14
PE3MD2 0
R/W PE3 Mode
13
PE3MD1 0
R/W Select the function of the PE3/TIOC0D/SCK0 pin.
12
PE3MD0 0
R/W 000: PE3 I/O (port)
001: TIOC0D I/O (MTU2)
110: SCK0 I/O (SCI)
Other than above: Setting prohibited
11

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
10
PE2MD2 0
R/W PE2 Mode
9
PE2MD1 0
R/W Select the function of the PE2/TIOC0C/TXD0 pin.
8
PE2MD0 0
R/W 000: PE2 I/O (port)
001: TIOC0C I/O (MTU2)
110: TXD0 output (SCI)
Other than above: Setting prohibited
7

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
6
PE1MD2 0
R/W PE1 Mode
5
PE1MD1 0
R/W Select the function of the PE1/TIOC0B/RXD0 pin.
4
PE1MD0 0
R/W 000: PE1 I/O (port)
001: TIOC0B I/O (MTU2)
110: RXD0 input (SCI)
Other than above: Setting prohibited
Rev. 3.00 Sep. 27, 2007 Page 546 of 758
REJ09B0243-0300