SH7125 Datasheet, PDF (165/782 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer

Section 7 User Break Controller (UBC)
8. Do not set a post-execution break at a SLEEP instruction or a branch instruction for which a
SLEEP instruction is placed in the delay slot. In addition, do not set a data access break at a
SLEEP instruction or one or two instructions before a SLEEP instruction.
Rev. 3.00 Sep. 27, 2007 Page 145 of 758
REJ09B0243-0300