SH7125 Datasheet, PDF (522/782 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer

Section 14 Compare Match Timer (CMT)
14.2 Register Descriptions
The CMT has the following registers. For details on register addresses and register states during
each processing, refer to section 20, List of Registers. Note that the channel number is omitted
from the register name in this section.
Table 14.1 Register Configuration
Register Name
Compare match timer start
register
Compare match timer
control/status register_0
Compare match counter_0
Compare match constant
register_0
Compare match timer
control/status register_1
Compare match counter_1
Compare match constant
register_1
Abbrevia-
tion
R/W Initial Value Address
Access Size
CMSTR
R/W H'0000
H'FFFFCE00 8, 16, 32
CMCSR_0 R/W H'0000
H'FFFFCE02 8, 16
CMCNT_0 R/W H'0000
CMCOR_0 R/W H'FFFF
H'FFFFCE04 8, 16, 32
H'FFFFCE06 8, 16
CMCSR_1 R/W H'0000
H'FFFFCE08 8, 16, 32
CMCNT_1 R/W H'0000
CMCOR_1 R/W H'FFFF
H'FFFFCE0A 8, 16
H'FFFFCE0C 8, 16, 32
Rev. 3.00 Sep. 27, 2007 Page 502 of 758
REJ09B0243-0300