|
SH7125 Datasheet, PDF (401/782 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer | |||
|
◁ |
Section 10 Port Output Enable (POE)
Section 10 Port Output Enable (POE)
The port output enable (POE) can be used to place the high-current pins (pins multiplexed with
TIOC3B, TIOC3D, TIOC4A, TIOC4B, TIOC4C, and TIOC4D in the MTU2) and the pins for
channel 0 of the MTU2 (pins multiplexed with TIOC0A, TIOC0B, TIOC0C, and TIOC0D) in
high-impedance state, depending on the change on POE0, POE1, POE3*, and POE8 input pins
and the output status of the high-current pins, or by modifying register settings. It can also
simultaneously generate interrupt requests.
10.1 Features
⢠Each of the POE0, POE1, POE3*, and POE8 input pins can be set for falling edge, PÏ/8 à 16,
PÏ/16 Ã 16, or PÏ/128 Ã 16 low-level sampling.
⢠High-current pins and the pins for channel 0 of the MTU2 can be placed in high-impedance
state by POE0, POE1, POE3*, and POE8 pin falling-edge or low-level sampling.
⢠High-current pins can be placed in high-impedance state when the high-current pin output
levels are compared and simultaneous active-level output continues for one cycle or more.
⢠High-current pins and the pins for channel 0 of the MTU2 can be placed in high-impedance
state by modifying the POE register settings.
⢠Interrupts can be generated by input-level sampling or output-level comparison results.
The POE has input level detection circuits, output level comparison circuits, and a high-impedance
request/interrupt request generating circuit as shown in figure 10.1, Block Diagram of POE.
In addition to control by the POE, high-current pins can be placed in high-impedance state when
the oscillator stops or in software standby state. For details, refer to appendix A, Pin States.
Note: * The POE3 pin is supported only by the SH7125.
TIMMTU1A_020020030800
Rev. 3.00 Sep. 27, 2007 Page 381 of 758
REJ09B0243-0300
|
▷ |