OXMPCI952 Datasheet, PDF(88/108 Page) Oxford Semiconductor – Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.

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OXMPCI952 Datasheet, PDF (88/108 Pages) Oxford Semiconductor – Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.

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OXFORD SEMICONDUCTOR LTD.

OXmPCI952

11.3 Serial ports

Isochronous (x1 Clock) Timing:

Symbol

tirs

tirh

tits

Parameter

SIN set-up time to Isochronous input clock âRx_Clk_In rising 1

SIN hold time after Isochronous input clock âRx_Clk_Inâ rising 1

SOUT valid after Isochronous output clock âTx_Clk_Outâ falling 1

Min

Max

Units

TBD

Table 31: Isochronous mode timing

Note 1:

In Isochronous mode, transmitter data is available after the falling edge of the x1 clock and the receiver data is sampled using the rising edge of the

x1 clock. The system designer is should ensure that mark-to-space ratio of the x1 clock is such that the required set-up and hold timing constraint

are met. One way of achieving this is to choose a crystal frequency which is twice the required data rate and then divide the clock by two using the

on-board prescaler. In this case the mark-to-space ratio is 50/50 for the purpose of set-up and hold calculations.

DS-0020 Jun 05

Page 88

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