OXMPCI952 Datasheet, PDF (10/108 Pages) Oxford Semiconductor – Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.

OXFORD SEMICONDUCTOR LTD.
OXmPCI952
2.2 Pin Descriptions
For the actual pinouts of the OXmPCI952 device for this package type, please refer to section 2.1 Pinouts.
PCI / mini-PCI Interface
Mode 0, Mode 1
139, 140, 141, 143, 144,
145, 147, 148, 151, 152,
155, 156, 157, 160, 1, 2,
14, 15, 18, 19, 20, 23, 24,
26, 28, 29, 32, 33, 34, 36,
37, 38
149, 3, 13, 27
137
4
7
5
6
9
12
11
10
150
135
133
134
134
138
Dir¹
P_I/O
P_I
P_I
P_I
P_O
P_I
P_O
P_O
P_I/O
P_O
P_I/O
P_I
P_I
P_OD
P_OD
P_I/O
P_OD
Name
AD[31:0]
Description
Multiplexed PCI Address/Data bus
C/BE[3:0]#
CLK
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
PAR
SERR#
PERR#
IDSEL
RST#
INTA#
INTB#
CLKRUN#
PME#
PCI Command/Byte enable
PCI system clock
Cycle Frame
Device Select
Initiator ready
Target ready
Target Stop request
Parity
System error
Parity error
Initialisation device select
PCI system reset
Default PCI Interrupt Line. For Function 0 and Function 1
Optional PCI interrupt Line (PCI Mode)
ClockRun# Line
(mini-PCI mode)
Power management event
Serial port pins
Mode 0, Mode 1
46
55, 54
68, 47
66, 49
Dir¹ Name
I FIFOSEL
O(h) SOUT[1:0]
Description
FIFO select. For backward compatibility with 16C550,
16C650 and 16C750 devices the UARTs’ FIFO depth is 16
when FIFOSEL is low. The FIFO size is increased to 128
when FIFOSEL is high. The unlatched state of this pin is
readable by software. The FIFO size may also be set to 128
by setting FCR[5] when LCR[7] is set, or by putting the
device into enhanced mode.
UART serial data outputs
IrDA_Out[1:0]
I(h) SIN[1:0]
UART IrDA data output when MCR[6] of the corresponding
channel is set in enhanced mode
UART serial data inputs
I(h) IrDA_In[1:0]
I(h) DCD[1:0]#
UART IrDA data input when IrDA mode is enabled (see
above)
Active-low modem data-carrier-detect input
DS-0020 Jun 05
Page 10