OXMPCI952 Datasheet, PDF (33/108 Pages) Oxford Semiconductor – Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.

OXFORD SEMICONDUCTOR LTD.
OXmPCI952
Bits
27:24
Description
Write Control Assertion (Intel-type interface). Defines the number of
clock cycles after the Reference Cycle when the LBWR# pin is asserted
(low) during a write to the Local Bus. ¹
Read/Write
EEPROM _PCI
W
RW
Reset
0h
(1h for
parallel port)
Write Data-strobe Assertion (Motorola-type interface). Defines the
number of clock cycles after the Reference Cycle when the LBDS[3:0]#
pins are asserted (low) during a write to the Local Bus. ¹
31:28
Write Control De-assertion (Intel-type interface). Defines the number of
W
RW
2h
clock cycles after the Reference Cycle when the LBWR# pin is de-
asserted (high) during a write to the Local Bus. ¹
Write Data-strobe De-assertion (Motorola-type interface). Defines the
number of clock cycles after the Reference Cycle when the LBDS[3:0]#
pins are de-asserted (high) during a write cycle to the Local Bus. ¹
Note 1: Only values in the range of 0h to Ah (0-10 decimal) are valid. Other values are reserved. See notes in the following page.
5.4.4 Local Bus Timing Parameter register 2 ‘LT2’ (Offset 0x0C):
Bits
3:0
7:4
11:8
15:12
19:16
22:20
Description
Write Data Bus Assertion. This register defines the number of clock
cycles after the Reference Cycle when the LBD pins actively drive the
data bus during a write operation to the Local Bus. ¹
Write Data Bus De-assertion. This register defines the number of clock
cycles after the Reference Cycle when the LBD pins go high-impedance
during a write operation to the Local Bus. ^1,2
Read Data Bus Assertion. This register defines the number of clock
cycles after the Reference Cycle when the LBD pins actively drive the
data bus at the end of a read operation from the Local Bus. ¹
Read Data Bus De-assertion. This register defines the number of clock
cycles after the Reference Cycle when the LBD pins go high-impedance
during at the beginning of a read cycle from the Local Bus. ¹
Reserved.
IO Space Block Size of BAR0 in Function1.
000 = Reserved
100 = 32 Bytes
001 = 4 Bytes
101 = 64 Bytes
010 = 8 Bytes
110 = 128 Bytes
011 = 16 Bytes
111 = 256 Bytes
Read/Write
EEPROM _PCI
W
RW
W
RW
W
RW
W
RW
-
R
W
R
Reset
0h
Fh
4h
(2h for
parallel
port)
0h
0h
‘100’
(=‘010’
for parallel
port)
DS-0020 Jun 05
Page 33