OXMPCI952 Datasheet, PDF (44/108 Pages) Oxford Semiconductor – Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.

OXFORD SEMICONDUCTOR LTD.
OXmPCI952
H/W Reset
Enable CLKRUN#
CLKRUN# Circuitry Enabled (Either Function in D0 state)
Both Functions Placed in Low Power State
Disable CLKRUN#
CLKRUN# Disabled (Both Functions in Low power State)
Both functions return to fully operation state
(D0)
PME# Event (wake-up)
Enable CLKRUN#
CLKRUN# Circuitry Enabled (both function in Low power State)
When either of the 2 functions are in the D0 Power-
Management state, the CLKRUN# circuitry is enabled to
prevent the host from stopping the PCI_CLK, at all times.
When the host places both functions into any one of the 2
low power states (D2 or D3) then, and only then, is the
CLKRUN# circuitry disabled. This means that the host will
be able to stop the PCI_CLK at the next available
opportunity, which was the likely purpose of placing both
functions into a low power state.
Once in the low power state, the OXmPCI952 device is not
driven by any PCI_CLKs but controls would have been set
up by the device drivers to allow the OXmPCI952 device to
generate ‘wake-up’ or PME# events. This PME# generation
will be via the Z_CTS and Z_RI pins for function0, and the
MIO-2 pin for function 1.
When the OXmPCI952 generates a PME# event, this event
is sufficient to get the attention of the Central Resource that
will kick-start the host to restart the PCI_CLKs to the
device. The same PME# event is used internally to re-
enable the CLKRUN# circuitry, so that if the host attempts
to stop the PCI_CLK before both functions are placed back
into the D0 (fully operational state) then it is prevented from
doing so.
The CLKRUN# circuitry can only be disabled again (ie the
cycle is repeated) once both functions are placed back into
the fully operation state DO. The host is expected to do this
following a PME# wake-up event.
The OXmPCI952 device should only be used with hosts
that implement the CLKRUN# line and the CLKRUN#
protocol. Some hosts may have the CLKRUN# line but may
not necessarily implement the CLKRUN# protocols, instead
leaving the CLKRUN# pin permanently held in the active
(low) state. This will be taken by the OXmPCI952 device as
the PCI_CLK always running. Such hosts may then remove
the PCI_CLK from the OXmPCI952 device without
notification on the CLKRUN# line when requesting the
SUSPEND function. This may lead to corrupted data when
file transfers subsequently take place owing to loss of the
PCI_CLK.
DS-0020 Jun 05
Page 44